USE OF RETRODIRECTIVE ARRAY PHASE CONJUGATION CIRCUITRY FOR NEAR- AND FAR-FIELD POSITION ANGLE OF ARRIVAL DETECTION

In this article, we present position indication functionality as obtained by using a retrodirective array, thereby allowing location information extraction of the position of the remote transmitter with which the retrodirective array is cooperating. This is carried out using straightforward circuitry with no requirement for complex angle of arrival algorithms, thereby giving a result in real time enabling tracking of fast moving transmitters. We show using a 10 x element retrodirective array, operating at 2.4 GHz that accuracies of far-field angle of arrival of within +/- 1 degrees over the arrays +/- 30 degrees azimuth field of view are possible. While in the near-field for angles of arrival of +/- 10 degrees it is possible to extract the position of a dipole source down to a resolution of 032 lambda. (C) 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52: 1031-1034, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.25097

Retrodirective Array Performance in the Presence of Near Field Obstructions

We investigate the situation where there are obstructing elements present in the near field of a retrodirective array. We describe three scattering cases, (1) by an array of straight wires, (2) by low loss medium density fibre board partially obscuring the array, and (3) by concrete blocks, totally and then partially obscuring the array. For all scenarios retrodirective action was shown to be able to provide various degrees of automatic compensation for loss in gain relative to that which would have occurred for a conventional (non-retrodirective) array in the presence of the same scattering screens. Gain improvements of up to 10 dB were observed when the retrodirective array was used. In addition we show how the induced variation of received and re-transmited amplitudes across the array, caused by the scattering screens, is the principle mechanism causing deterioration of the retrodirective arrays monostatic response.

Near-field distribution of optical transmission of periodic subwavelength holes in a metal film

Optical transmission of a two-dimensional array of subwavelength holes in a metal film has been numerically studied using a differential method. Transmission spectra have been calculated showing a significant increase of the transmission in certain spectral ranges corresponding to the excitation of the surface polariton Bloch waves on a metal surface with a periodic hole structure. Under the enhanced transmission conditions, the near-field distribution of the transmitted light reveals an intensity enhancement greater than 2 orders of magnitude in localized (similar to 40 nm) spots resulting from the interference of the surface polaritons Bragg scattered by the holes in an array.

Field configured assembly: Programmed manipulation and self-assembly at the mesoscale

Field configured assembly is a programmable force field method that permits rapid, "hands-free" manipulation, assembly, and integration of mesoscale objects and devices. In this method, electric fields, configured by specific addressing of receptor and counter electrode sites pre-patterned at a silicon chip substrate, drive the field assisted transport, positioning, and localization of mesoscale devices at selected receptor locations. Using this approach, we demonstrate field configured deterministic and stochastic self-assembly of model mesoscale devices, i.e., 50 mum diameter, 670 nm emitting GaAs-based light emitting diodes, at targeted receptor sites on a silicon chip. The versatility of the field configured assembly method suggests that it is applicable to self-assembly of a wide variety of functionally integrated nanoscale and mesoscale systems.

An FPGA Based Coprocessor for GLCM and Haralick Texture Features and Their Application in Prostate Cancer Classification

Grey Level Co-occurrence Matrix (GLCM), one of the best known tool for texture analysis, estimates image properties related to second-order statistics. These image properties commonly known as Haralick texture features can be used for image classification, image segmentation, and remote sensing applications. However, their computations are highly intensive especially for very large images such as medical ones. Therefore, methods to accelerate their computations are highly desired. This paper proposes the use of programmable hardware to accelerate the calculation of GLCM and Haralick texture features. Further, as an example of the speedup offered by programmable logic, a multispectral computer vision system for automatic diagnosis of prostatic cancer has been implemented. The performance is then compared against a microprocessor based solution.

A programmable architecture for layered multimedia streams in IPv6 networks

A new configurable architecture is presented that offers multiple levels of video playback by accommodating variable levels of network utilization and bandwidth. By utilizing scalable MPEG-4 encoding at the network edge and using specific video delivery protocols, media streaming components are merged to fully optimize video playback for IPv6 networks, thus improving QoS. This is achieved by introducing “programmable network functionality” (PNF) which splits layered video transmission and distributes it evenly over available bandwidth, reducing packet loss and delay caused by out-of-profile DiffServ classes. An FPGA design is given which gives improved performance, e.g. link utilization, end-to-end delay, and that during congestion, improves on-time delivery of video frames by up to 80% when compared to current “static” DiffServ.

A Scalable and Programmable Modular Traffic Manager Architecture

A key issue in the design of next generation Internet routers and switches will be provision of traffic manager (TM) functionality in the datapaths of their high speed switching fabrics. A new architecture that allows dynamic deployment of different TM functions is presented. By considering the processing requirements of operations such as policing and congestion, queuing, shaping and scheduling, a solution has been derived that is scalable with a consistent programmable interface. Programmability is achieved using a function computation unit which determines the action (e.g. drop, queue, remark, forward) based on the packet attribute information and a memory storage part. Results of a Xilinx Virtex-5 FPGA reference design are presented.

FPGA montgomery modular multiplication architectures suitable for ECCs over GF(p)

New FPGA architectures for the ordinary Montgomery multiplication algorithm and the FIOS modular multiplication algorithm are presented. The embedded 18×18-bit multipliers and fast carry look-ahead logic located on the Xilinx Virtex2 Pro family of FPGAs are used to perform the ordinary multiplications and additions/subtractions required by these two algorithms. The architectures are developed for use in Elliptic Curve Cryptosystems over GF(p), which require modular field multiplication to perform elliptic curve point addition and doubling. Field sizes of 128-bits and 256-bits are chosen but other field sizes can easily be accommodated, by rapidly reprogramming the FPGA. Overall, the larger the word size of the multiplier, the more efficiently it performs in terms of area/time product. Also, the FIOS algorithm is flexible in that one can tailor the multiplier architecture is to be area efficient, time efficient or a mixture of both by choosing a particular word size. It is estimated that the computation of a 256-bit scalar point multiplication over GF(p) would take about 4.8 ms.

Near-field enhancement for infrared sensor applications

A detailed investigation on planar two dimensional metallodielectric dipole arrays with enhanced near-fields for sensing applications was carried out. Two approaches for enhancing the near-fields and increasing the quality factor were studied. The reactive power stored in the vicinity of the array at resonance increases rapidly with increasing periodicity. Higher quality factors are produced as a result. The excitation of the odd mode in the presence of a perturbation gives rise to a sharp resonance with near-field enhanced by at least an order of magnitude compared to unperturbed arrays. The trade-off between near-field enhancement and thermal losses was also studied, and the effect of supporting dielectric layers on thermal losses and quality factors were examined. Secondary transmissions due to the dielectric alone were found to enhance and reduce cyclically the quality factor as a function of the thickness of the dielectric material. The performance of a perturbed frequency selective surface in sensing nearby materials was investigated. Finally, unperturbed and perturbed arrays working at infrared frequencies were demonstrated experimentally. (C) 2011 Society of Photo-Optical Instrumentation Engineers (SPIE). [DOI: 10.1117/1.3604785]

A Pipeline Interleaved Heterogeneous SIMD Soft Processor Array Architecture for MIMO-OFDM Detection

The most promising way to maintain reliable data transfer across the rapidly fluctuating channels used by next generation multiple-input multiple-output communications schemes is to exploit run-time variable modulation and antenna configurations. This demands that the baseband signal processing architectures employed in the communications terminals must provide low cost and high performance with runtime reconfigurability. We present a softcore-processor based solution to this issue, and show for the first time, that such programmable architectures can enable real-time data operation for cutting-edge standards
such as 802.11n; furthermore, by exploiting deep processing pipelines and interleaved task execution, the cost and performance of these architectures is shown to be on a par with traditional dedicated circuit based solutions. We believe this to be the first such programmable architecture to achieve this, and the combination of implementation efficiency and programmability makes this implementation style the most promising approach for hosting such dynamic architectures.

QCA Systolic array design

Quantum-dot Cellular Automata (QCA) technology is a promising potential alternative to CMOS technology. To explore the characteristics of QCA and suitable design methodologies, digital circuit design approaches have been investigated. Due to the inherent wire delay in QCA, pipelined architectures appear to be a particularly suitable design technique. Also, because of the pipeline nature of QCA technology, it is not suitable for complicated control system design. Systolic arrays take advantage of pipelining, parallelism and simple local control. Therefore, an investigation into these architectures in QCA technology is provided in this paper. Two case studies, (a matrix multiplier and a Galois Field multiplier) are designed and analyzed based on both multilayer and coplanar crossings. The performance of these two types of interconnections are compared and it is found that even though coplanar crossings are currently more practical, they tend to occupy a larger design area and incur slightly more delay. A general semi-conductor QCA systolic array design methodology is also proposed. It is found that by applying a systolic array structure in QCA design, significant benefits can be achieved particularly with large systolic arrays, even more so than when applied in CMOS-based technology.