A scalable packet sorting circuit for high-speed WFQ packet scheduling

A novel implementation of a tag sorting circuit for a weighted fair queueing (WFQ) enabled Internet Protocol (IP) packet scheduler is presented. The design consists of a search tree, matching circuitry, and a custom memory layout. It is implemented using 130-nm silicon technology and supports quality of service (QoS) on networks at line speeds of 40 Gb/s, enabling next generation IP services to be deployed.

Effects of Interface Conditions and Long-Term Stability of Passive Intermodulation Response in Printed Lines

An experimental investigation of the effect of conductor-to-substrate interface on distributed passive intermodulation (PIM) generation in printed microstrip lines has been undertaken using the custom-designed microwave laminates with removed surface bonding layers and with the commercial adhesion promotion applied to the conductor underside. The study of long-term stability of PIM performance of the printed circuits is reported for the first time. The comprehensive measurement results, observations of the selfimprovement of the PIM performance and the effect of panel bending on PIM generation in printed boards with different finishing are presented. A consistent physical interpretation of the observed phenomena is proposed. The results of this study provide new important considerations for the design and characterisation of low-PIM printed circuits.

An efficient neural network approach for nanoscale FinFET modelling and circuit simulation

The present paper demonstrates the suitability of artificial neural network (ANN) for modelling of a FinFET in nano-circuit simulation. The FinFET used in this work is designed using careful engineering of source-drain extension, which simultaneously improves maximum frequency of oscillation f(max) because of lower gate to drain capacitance, and intrinsic gain A(V0) = g(m)/g(ds), due to lower output conductance g(ds). The framework for the ANN-based FinFET model is a common source equivalent circuit, where the dependence of intrinsic capacitances, resistances and dc drain current I-d on drain-source V-ds and gate-source V-gs is derived by a simple two-layered neural network architecture. All extrinsic components of the FinFET model are treated as bias independent. The model was implemented in a circuit simulator and verified by its ability to generate accurate response to excitations not used during training. The model was used to design a low-noise amplifier. At low power (J(ds) similar to 10 mu A/mu m) improvement was observed in both third-order-intercept IIP3 (similar to 10 dBm) and intrinsic gain A(V0) (similar to 20 dB), compared to a comparable bulk MOSFET with similar effective channel length. This is attributed to higher ratio of first-order to third-order derivative of I-d with respect to gate voltage and lower g(ds), in FinFET compared to bulk MOSFET. Copyright (C) 2009 John Wiley & Sons, Ltd.

Assessing and training standing balance in older adults: A novel approach using the 'Nintendo Wii' Balance Board

Older adults, deemed to be at a high risk of falling, are often unable to participate in dynamic exercises due to physical constraints and/or a fear of falling. Using the Nintendo 'Wii Balance Board' (WBB) (Nintendo, Kyoto, Japan), we have developed an interface that allows a user to accurately calculate a participant's centre of pressure (COP) and incorporate it into a virtual environment to create bespoke diagnostic or training programmes that exploit real-time visual feedback of current COP position. This platform allows researchers to design, control and validate tasks that both train and test balance function. This technology provides a safe, adaptable and low-cost balance training/testing solution for older adults, particularly those at high-risk of falling.

Solid-state sodium-selective sensors based on screen-printed Ag/AgCl reference electrodes

The potentiometric and AC impedance characteristics of all solid-state sodium-selective electrodes based on planar screen-printed Ag/AgCl electrodes are described. Two solid-state designs have been investigated. The first was based on the deposition of a sodium-selective PVC membrane directly on top of a screen-printed Ag/AgCl electrode, The second design included a NaCl doped hydrogel layer, between the PVC and Ag\AgCl layers. The hydrogel provides a mechanism to relieve any blockage to charge transfer occurring when PVC membranes are used directly on top of Ag/AgCl and also improves adhesion between the two layers. Results suggest the electrodes display Fast ion exchange kinetics, low noise and drift. The performance compares favorably to that of a conventional ion-selective electrode with internal filling solution.