CMOS IMPLEMENTATION OF A SYSTOLIC MULTI-BIT CONVOLVER CHIP.

The implementation of a multi-bit convolver chip based on a systolic array is described. The convolver is fabricated on a 7mm multiplied by 8mm CMOS chip and operates on 8-bit serial data and coefficient words. It has a length of 17 stages, and this is cascadable. The circuit can be clocked at more than 20 MHz giving a data throughput rate of greater than 1 Mword/s. Details of important implementation decisions and a summary of chip characteristics are given together with the advantages which the systolic approach has afforded to the design process.

Optimized bit level architectures for IIR filtering

Optimized circuits for implementing high-performance bit-parallel IIR filters are presented. Circuits constructed mainly from simple carry save adders and based on most-significant-bit (MSB) first arithmetic are described. Two methods resulting in systems which are 100% efficient in that they are capable of sampling data every cycle are presented. In the first approach the basic circuit is modified so that the level of pipelining used is compatible with the small, but fixed, latency associated with the computation in question. This is achieved through insertion of pipeline delays (half latches) on every second row of cells. This produces an area-efficient solution in which the throughput rate is determined by a critical path of 76 gate delays. A second approach combines the MSB first arithmetic methods with the scattered look-ahead methods. Important design issues are addressed, including wordlength truncation, overflow detection, and saturation.

The (Soft) Power of Commitment:The EU and Conflict Resolution in Northern Ireland

This paper examines the potential of international actors to contribute to conflict resolution by analysing the evolving role of the European Union (EU) in embedding Northern Ireland's peace process. Scrutiny of the EU's approach to conflict resolution in Northern Ireland offers useful insights into the scope and potential of soft power for facilitating behavioural change from governmental to grass-roots levels. This paper traces the development of the EU's approach to conflict resolution in Northern Ireland from one concentrated on encouraging state-level agreement, to nurturing peace through multilevel funding, through now to consolidating the peace by facilitating regional-level empowerment. The core argument is that, in sum, the most critical element of the EU's contribution to peace in Northern Ireland has been, quite simply, that of enduring commitment.

The Irish High Court Issues its First Order on a Commitment Agreement between the NCA and an Undertaking (Fitflop)

The Irish Competition (Amendment) Act 2012 introduced court-endorsed commitment agreements to Irish competition law. The new section 14B of the principal Competition Act 2002 provides for making commitment agreements between the Irish Competition and undertakings an order of the Irish High Court. This piece, first, investigates the prior Irish practice regarding commitment or settlement agreements and its legal basis. It looks then into the newly introduced rules on court-endorsed commitment agreements. Finally, before concluding, it points to the first instance of their application — to an order issued by the High Court in the FitFlop case in December 2012, which came into effect in February 2013.

THE IMPROVED SIGN BIT ENCRYPTION OF MOTION VECTORS FOR H.264/AVC

In this paper, an improved video encryption method for encrypting the sign bit of motion vectors is proposed based on H.264/AVC, which belongs to selective encryption. This method improves upon previous work involving the sign bit encryption of motion vectors by ensuring the four candidates for the encrypted motion vectors are always located in two orthogonal lines. The improved method can provide a much more effective scrambling effect while keeping the encrypted stream format-compliant and the compression ratio unchanged. The combination of the proposed method with encryption of intra prediction modes can further enhance the scrambling effect, especially for the first few frames which are left clear when only the motion vectors are encrypted.

A Tight Upper Bound on Bit Error Rate of Joint OFDM and Multi-Carrier Index Keying

This letter investigates performance enhancement by the concept of multi-carrier index keying in orthogonal frequency division multiplexing (OFDM) systems. For the performance evaluation, a tight closed-form approximation of the bit error rate (BER) is derived introducing the expression for the number of bit errors occurring in both the index domain and the complex domain, in the presence of both imperfect and perfect detection of active multi-carrier indices. The accuracy of the derived BER results for various cases are validated using simulations, which can provide accuracy within 1 dB at favorable channels.

Bit erasure analysis of binary adders in quantum-dot cellular automata

As a post-CMOS technology, the incipient Quantum-dot Cellular Automata technology has various advantages. A key aspect which makes it highly desirable is low power dissipation. One method that is used to analyse power dissipation in QCA circuits is bit erasure analysis. This method has been applied to analyse previously proposed QCA binary adders. However, a number of improved QCA adders have been proposed more recently that have only been evaluated in terms of area and speed. As the three key performance metrics for QCA circuits are speed, area and power, in this paper, a bit erasure analysis of these adders will be presented to determine their power dissipation. The adders to be analysed are the Carry Flow Adder (CFA), Brent-Kung Adder (B-K), Ladner-Fischer Adder (L-F) and a more recently developed area-delay efficient adder. This research will allow for a more comprehensive comparison between the different QCA adder proposals. To the best of the authors' knowledge, this is the first time power dissipation analysis has been carried out on these adders.