HI observations of the high-velocity cloud in the direction of M 92

We present wide-field neutral hydrogen (H I) Lovell telescope multibeam, and Dominion Radio Astrophysical Observatory Hi synthesis observations, of the high velocity cloud (HVC) located in the general direction of the globular cluster M92. This cloud is part of the larger Complex C and lies at velocities between similar to -80 and -130 km s(-1) in the Local Standard of Rest. The Lovell telescope observations, of resolution 12 arcmin spatially and 3.0 km s(-1) in velocity, fully sampling a 3.1 degrees x 12.6 degrees RA-Dec grid, have found that this part of HVC Complex C comprises two main condensations, lying approximately north-south in declination, separated by similar to2 degrees and being parallel to the Galactic plane. At this resolution, peak values of the brightness temperature and Hi column density of similar to1.4 K and similar to5 x 10(19) cm(-2) are determined, with relatively high values of the full width half maximum velocity (FWHM) of similar to 22 km s(-1) being observed, equivalent to a gas kinetic temperature, in the absence of turbulence and geometric effects of similar to 10 000 K. Each of these properties, as well as the sizes of the clouds, are similar in the two components. The DRAO observations, towards the Northern HVC condensation, are the first high-resolution Hi spectra of Complex C. When smoothed to a resolution of 3 arcmin, they identify several Hi intensity peaks with column densities in the range 4-7 x 10(19) cm(-2). Further smoothing of these data to 6 arcmin resolution tentatively indicates that parts of the HVC consist of two velocity components, of similar brightness temperature, separated by similar to7 km s(-1) in velocity, and with FWHM velocity widths of similar to5-7 km s(-1). No IRAS 60 or 100 micron flux is associated with the M92 HVC. Cloud properties are briefly discussed and compared to previous observations of HVCs.

High Speed FPGA-based implementations of Delayed-LMS filters

A variation of the least means squares (LMS) algorithm, called the delayed LMS (DLMS) algorithm is an ideally suited to achieve highly pipelined, adaptive digital filter implementations. The paper presents an efficient method of determining the delays in the DLMS filter and then transferring these delays using retiming in order to achieve fully pipelined circuit architectures for FPGA implementation. The method has been used to derive a series of retimed delayed LMS (RDLMS) architectures, which considerable reduce the number of delays and convergence time and give superior performance in terms of throughput rate when compared to previous work. Three circuit architectures and three hardware shared versions are presented which have been implemented using the Virtex-II FPGA technology resulting in a throughout rate of 182 Msample/s.

Virtex FPGA Implementation of a Pipelined Adaptive LMS Predictor for Electronic Support Measures Receivers

High-speed field-programmable gate array (FPGA) implementations of an adaptive least mean square (LMS) filter with application in an electronic support measures (ESM) digital receiver, are presented. They employ "fine-grained" pipelining, i.e., pipelining within the processor and result in an increased output latency when used in the LMS recursive system. Therefore, the major challenge is to maintain a low latency output whilst increasing the pipeline stage in the filter for higher speeds. Using the delayed LMS (DLMS) algorithm, fine-grained pipelined FPGA implementations using both the direct form (DF) and the transposed form (TF) are considered and compared. It is shown that the direct form LMS filter utilizes the FPGA resources more efficiently thereby allowing a 120 MHz sampling rate.

Design Methodology for Real-Time FPGA-Based Sound Synthesis

Explicit finite difference (FD) schemes can realise highly realistic physical models of musical instruments but are computationally complex. A design methodology is presented for the creation of FPGA-based micro-architectures for FD schemes which can be applied to a range of applications with varying computational requirements, excitation and output patterns and boundary conditions. It has been applied to membrane and plate-based sound producing models, resulting in faster than real-time performance on a Xilinx XC2VP50 device which is 10 to 35 times faster than general purpose and DSP processors. The models have developed in such a way to allow a wide range of interaction (by a musician) thereby leading to the possibility of creating a highly realistic digital musical instrument.

A Novel Packet Marking Function for Real-Time Interactive MPEG-4 Video Applications in a Differentiated Services Network

The future convergence of voice, video and data applications on the Internet requires that next generation technology provides bandwidth and delay guarantees. Current technology trends are moving towards scalable aggregate-based systems where applications are grouped together and guarantees are provided at the aggregate level only. This solution alone is not enough for interactive video applications with sub-second delay bounds. This paper introduces a novel packet marking scheme that controls the end-to-end delay of an individual flow as it traverses a network enabled to supply aggregate- granularity Quality of Service (QoS). IPv6 Hop-by-Hop extension header fields are used to track the packet delay encountered at each network node and autonomous decisions are made on the best queuing strategy to employ. The results of network simulations are presented and it is shown that when the proposed mechanism is employed the requested delay bound is met with a 20% reduction in resource reservation and no packet loss in the network.