Managing the variability of supply in the European power system with high wind energy penetration

The power system of the future will have a hierarchical structure created by layers of system control from via regional high-voltage transmission through to medium and low-voltage distribution. Each level will have generation sources such as large-scale offshore wind, wave, solar thermal, nuclear directly connected to this Supergrid and high levels of embedded generation, connected to the medium-voltage distribution system. It is expected that the fuel portfolio will be dominated by offshore wind in Northern Europe and PV in Southern Europe. The strategies required to manage the coordination of supply-side variability with demand-side variability will include large scale interconnection, demand side management, load aggregation and storage in the concept of the Supergrid combined with the Smart Grid. The design challenge associated with this will not only include control topology, data acquisition, analysis and communications technologies, but also the selection of fuel portfolio at a macro level. This paper quantifies the amount of demand side management, storage and so-called ‘back-up generation’ needed to support an 80% renewable energy portfolio in Europe by 2050.

Inexact-aware architecture design for ultra-low power bio-signal analysis

This study introduces an inexact, but ultra-low power, computing architecture devoted to the embedded analysis of bio-signals. The platform operates at extremely low voltage supply levels to minimise energy consumption. In this scenario, the reliability of static RAM (SRAM) memories cannot be guaranteed when using conventional 6-transistor implementations. While error correction codes and dedicated SRAM implementations can ensure correct operations in this near-threshold regime, they incur in significant area and energy overheads, and should therefore be employed judiciously. Herein, the authors propose a novel scheme to design inexact computing architectures that selectively protects memory regions based on their significance, i.e. their impact on the end-to-end quality of service, as dictated by the bio-signal application characteristics. The authors illustrate their scheme on an industrial benchmark application performing the power spectrum analysis of electrocardiograms. Experimental evidence showcases that a significance-based memory protection approach leads to a small degradation in the output quality with respect to an exact implementation, while resulting in substantial energy gains, both in the memory and the processing subsystem.

6-T SRAM cell design with nanoscale double-gate SOI MOSFETs: impact of source/drain engineering and circuit topology

The impact of source/drain engineering on the performance of a six-transistor (6-T) static random access memory (SRAM) cell, based on 22 nm double-gate (DG) SOI MOSFETs, has been analyzed using mixed-mode simulation, for three different circuit topologies for low voltage operation. The trade-offs associated with the various conflicting requirements relating to read/write/standby operations have been evaluated comprehensively in terms of eight performance metrics, namely retention noise margin, static noise margin, static voltage/current noise margin, write-ability current, write trip voltage/current and leakage current. Optimal design parameters with gate-underlap architecture have been identified to enhance the overall SRAM performance, and the influence of parasitic source/drain resistance and supply voltage scaling has been investigated. A gate-underlap device designed with a spacer-to-straggle (s/sigma) ratio in the range 2-3 yields improved SRAM performance metrics, regardless of circuit topology. An optimal two word-line double-gate SOI 6-T SRAM cell design exhibits a high SNM similar to 162 mV, I-wr similar to 35 mu A and low I-leak similar to 70 pA at V-DD = 0.6 V, while maintaining SNM similar to 30% V-DD over the supply voltage (V-DD) range of 0.4-0.9 V.

Pre- to Post-discharge Behavior in Saline Solution

The development of a plasma discharge at low voltage (200-600 V) in saline solution is characterized using fast and standard CCD camera imaging. Vapor formation, plasma formation, and vapor collapse and subsequent pressure wave propagation are observed. If, with increasing voltage, the total energy deposited is kept approximately constant, the sequence and nature of events are similar but develop faster and more reproducibly at the higher voltages. This is attributed to the slower temporal evolution of the vapor layer at lower voltages which means a greater sensitivity to hydrodynamic instabilities at the vapor-liquid interface.

Plasmas in liquids and some of their applications in nanoscience

The range of applications for plasmas in liquids, plasmas in contact with liquid surfaces and plasmas containing liquid drops is growing rapidly across a range of technologies. Here the focus is on plasmas where the electrodes are immersed in liquids and their applications in nanoscience. The physical phenomena in both high voltage (tens of kilovolts) and low voltage (a few hundred volts) plasmas in liquid are described together with a discussion of the plasma-induced chemistry. Studies show that in water the plasmas are formed in water vapour created by Joule heating as either channels in the liquid or as layers on the electrodes. The chemistry in these water vapour plasmas and at their interface with the liquid is discussed in the context of the highly reactive radicals produced, such as H and OH. The current use of a variety of plasmas-in-liquid systems in the area of nanoscience is discussed, with an emphasis on nanoparticle growth.

Large-Scale Wind Generator Cascaded Tripping

Large scale wind farms are subject to tripping, as a consequence of turbine failure, over-sensitive protection, turbines not equipped with low-voltage ride through (LVRT), and reactive power compensation device defects which can lead to voltage rises. This paper considers pertinent issues which render tripping based on a study of LVRT and wind farm protection, with methods to avoid large scale wind generator tripping proposed. The results of LVRT field tests in Jiuquan, China in December 2012 show that the proposed approaches are effective. The paper also presents work which proposes an early warning system to forecast the risk of wind power tripping.

Transient Stability Analysis of a Power System with High Wind Penetration

This paper presents transient stability analysis for a power system with high wind penetration. The transient stability has been evaluated based on two stability criteria: rotor angle stability and voltage stability. A modified IEEE-14 bus system has been used as the main study network and simulations have been conducted at several wind power penetration levels, defined as a fraction of total system generation. A wide range of scenarios have been presented based on the wind farm voltage at the point of connection, i.e. low voltage (LV) distribution level and high voltage (HV) transmission level, and the type of wind generator technology, i.e. fixed speed induction generator (FSIG) and doubly-fed induction generator (DFIG).

Impact of Heat Pump Load on Distribution Networks

Heat pumps can provide domestic heating at a cost that is competitive with oil heating in particular. If the electricity supply contains a significant amount of renewable generation, a move from fossil fuel heating to heat pumps can reduce greenhouse gas emissions. The inherent thermal storage of heat pump installations can also provide the electricity supplier with valuable flexibility. The increase in heat pump installations in the UK and Europe in the last few years poses a challenge for low-voltage networks, due to the use of induction motors to drive the pump compressors. The induction motor load tends to depress voltage, especially on starting. The paper includes experimental results, dynamic load modelling, comparison of experimental results and simulation results for various levels of heat pump deployment. The simulations are based on a generic test network designed to capture the main characteristics of UK distribution system practice. The simulations employ DIgSlILENT to facilitate dynamic simulations that focus on starting current, voltage variations, active power, reactive power and switching transients.

A 2.2 GHz High-Efficiency Third-Harmonic-Peaking Class-EF Power Amplifier

This paper presents the design and implementation of a low-voltage-stress Class-EF power amplifier (PA) with extended maximum operating frequency, named as ‘third-harmonic-peaking Class-EF PA’. A novel transmission-line load network is proposed to meet the Class-EF impedance requirements at the fundamental, all even harmonics, and third harmonic components. It also provides an impedance matching to a 50 Ω load. A more effective λ/8 open- and shorted-stub network is deployed at the drain of the transistor replacing the traditional λ/4 transmission line. Implemented using GaN HEMTs, the PA delivered 39.2 dBm output power with 80.5% drain efficiency and 71% PAE at 2.22 GHz.

Enhanced AIMD based decentralized residential charging of EVs

Moving from combustion engine to electric vehicle (EV)-based transport is recognized as having a major role to play in reducing pollution, combating climate change and improving energy security. However, the introduction of EVs poses major challenges for power system operation. With increasing penetration of EVs, uncontrolled coincident charging may overload the grid and substantially increase peak power requirements. Developing smart grid technologies and appropriate charging strategies to support the role out of EVs is therefore a high priority. In this paper, we investigate the effectiveness of distributed additive increase and multiplicative decrease (AIMD) charging algorithms, as proposed by Stu¨dli et al. in 2012, at mitigating the impact of domestic charging of EVs on low-voltage distribution networks. In particular, a number of enhancements to the basic AIMD implementation are introduced to enable local power system infrastructure and voltage level constraints to be taken into account and to reduce peak power requirements. The enhanced AIMD EV charging strategies are evaluated using power system simulations for a typical low-voltage residential feeder network in Ireland. Results show that by using the proposed AIMD-based smart charging algorithms, 50% EV penetration can be accommodated, compared with only 10% with uncontrolled charging, without exceeding network infrastructure constraints.

Evaluating fault tolerance on asymmetric multicore systems-on-chip using iso-metrics

The end of Dennard scaling has promoted low power consumption into a firstorder concern for computing systems. However, conventional power conservation schemes such as voltage and frequency scaling are reaching their limits when used in performance-constrained environments. New technologies are required to break the power wall while sustaining performance on future processors. Low-power embedded processors and near-threshold voltage computing (NTVC) have been proposed as viable solutions to tackle the power wall in future computing systems. Unfortunately, these technologies may also compromise per-core performance and, in the case of NTVC, xreliability. These limitations would make them unsuitable for HPC systems and datacenters. In order to demonstrate that emerging low-power processing technologies can effectively replace conventional technologies, this study relies on ARM’s big.LITTLE processors as both an actual and emulation platform, and state-of-the-art implementations of the CG solver. For NTVC in particular, the paper describes how efficient algorithm-based fault tolerance schemes preserve the power and energy benefits of very low voltage operation.

A 76-84 GHz SiGe power amplifier array employing low-loss four-way differential combining transformer

This paper presents holistic design of a novel four-way differential power-combining transformer for use in millimeter-wave power-amplifier (PA). The combiner with an inner radius of 25 µm exhibits a record low insertion loss of 1.25 dB at 83.5 GHz. It is designed to simultaneously act as a balanced-to-unbalanced converter, removing the need for additional BALUNs typically required in differential circuits. A complete circuit comprised of a power splitter, two-stage differential cascode PA array, a power combiner as well as input and output matching elements was designed and realized in SiGe technology with f/f 170/250 GHz. Measured small-signal gain of at least 16.8 dB was obtained from 76.4 to 85.3 GHz with a peak 19.5 dB at 83 GHz. The prototype delivered 12.5 dBm output referred 1 dB compression point and 14 dBm saturated output power when operated from a 3.2 V dc supply voltage at 78 GHz.