165 resultados para swd: Smart Device


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An electron beam ion trap ( EBIT) has been designed and is currently under construction for use in atomic physics experiments at the Queen's University, Belfast. In contrast to traditional EBITs where pairs of superconducting magnets are used, a pair of permanent magnets will be used to compress the electron beam. The permanent magnets have been designed in conjunction with bespoke vacuum ports to give unprecedented access for photon detection. Furthermore, the bespoke vacuum ports facillitate a versatile, reconfigurable trap structure able to accommodate various in-situ detectors and in-line charged particle analysers. Although the machine will have somewhat lower specifications than many existing EBITs in terms of beam current density, it is hoped that the unique features will facilitate a number of hitherto impossible studies involving interactions between electrons and highly charged ions. In this article the new machine's design is outlined along with some suggestions of the type of process to be studied once the construction is completed.

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This paper provides valuable design insights for optimizing device parameters for nanoscale planar and vertical SOI MOSFETs. The suitability of nanoscale non-planar FinFETs and classical planar single and double gate SOI MOSFETs for rf applications is examined via extensive 3D device simulations and detailed interpretation. The origin of higher parasitic capacitance in FinFETs, compared to planar MOSFETs is examined. RF figures of merit for planar and vertical MOS devices are compared, based on layout-area calculations.

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In this study, a series of hydrogels was synthesized by free radical polymerization, namely poly(2-(hydroxyethyl) methacrylate) (pHEMA), poly(4-(hydroxybutyl)methacrylate) (pHBMA), poly(6-(hydroxyhexyl)methacrylate) (pHHMA), and copolymers composed of N-isopropylacrylamide (NIPAA), methacrylic acid (MA), NIPAA, and the above monomers. The surface, mechanical, and swelling properties (at 20 and 37 degrees C, pH 6) of the polymers were determined using dynamic contact angle analysis, tensile analysis, and thermogravimetry, respectively. The T-g and lower critical solution temperatures (LCST) were determined using modulated DSC and oscillatory rheometry, respectively. Drug loading of the hydrogels with chlorhexidine diacetate was performed by immersion in a drug solution at 20 degrees C (

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Concentrations of the coccidiostat nicarbazin as low as 2 mg/kg in feed can result in violative drug residues arising in poultry liver. A lateral flow device (LFD) was developed for the detection of contaminating concentrations of nicarbazin following solvent extraction of poultry feeds. Test results, as determined by both visual and instrumental measurement, are available within minutes. For 22 feed samples, nicarbazin-free and fortified at 2 mg/kg, the % relative inhibition ranged from 0 to 45% and from 53 to 85%, respectively. Nicarbazin contamination at the critical concentration (2 mg/kg) can be determined in all cases providing the sampling is representative. A wide range of feed samples taken at a mill that incorporated nicarbazin into poultry feed were analyzed. Data generated for these samples by both the LFDs and a mass spectrometric method were compared, and a significant correlation was achieved.

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This paper explores the potential of germanium on sapphire (GeOS) wafers as a universal substrate for System on a Chip (SOC), mm wave integrated circuits (MMICs) and optical imagers. Ge has a lattice constant close to that of GaAs enabling epitaxial growth. Ge, GaAs and sapphire have relatively close temperature coefficients of expansion (TCE), enabling them to be combined without stress problems. Sapphire is transparent over the range 0.17 to 5.5 µm and has a very low loss tangent (a) for frequencies up to 72 GHz. Ge bonding to sapphire substrates has been investigated with regard to micro-voids and electrical quality of the Ge back interface. The advantages of a sapphire substrate for integrated inductors, coplanar waveguides and crosstalk suppression are also highlighted. MOS transistors have been fabricated on GeOS substrates, produced by the Smart-cut process, to illustrate the compatibility of the substrate with device processing. © 2008 World Scientific Publishing Company.