Track displacement and energy loss in a railway embankment

The mainline railway track between Dublin and Belfast was constructed during the 1850s, with substantial lengths of railway embankment constructed over soft, peaty soils. In recent years Northern Ireland Railways (NIR) has noticed that the sections of the railway track constructed on these peaty soils have been deteriorating at an increasing rate. Train speeds have been reduced in response to concerns that cyclic track displacements appear to be increasing over time in response to train loading. Track maintenance has also increased significantly. The research described in this paper was undertaken to quantify the response to cyclic train loading of two portions of this track founded on peaty soils. Track displacements were recorded using a sensor system specifically created for this project. The sensor consisted of a photosensitive array, mounted on the sleepers, and a laser, which was targeted onto the photosensitive array from a location outside the area of influence of train loading. Track deflections from 5 to 20 mm were measured under train speeds from near zero to over 120 km/h. The temporal variation in track displacement was used to calibrate an analytical (Winkler) model. This analysis suggests that the deformation of the embankment under train loading was not due to dynamic excitation but rather to static deformation of the poor-quality fill and soft foundation materials. As a consequence, the analytical model highlighted that train speed has limited effect on the magnitude of the deflection of the embankment within NIR operating speeds, but has the potential to significantly reduce the power lost to the damping within the embankment and subgrade.

A scalable packet sorting circuit for high-speed WFQ packet scheduling

A novel implementation of a tag sorting circuit for a weighted fair queueing (WFQ) enabled Internet Protocol (IP) packet scheduler is presented. The design consists of a search tree, matching circuitry, and a custom memory layout. It is implemented using 130-nm silicon technology and supports quality of service (QoS) on networks at line speeds of 40 Gb/s, enabling next generation IP services to be deployed.

Fully hardware based WFQ architecture for high-speed QoS packet scheduling

A full hardware implementation of a Weighted Fair Queuing (WFQ) packet scheduler is proposed. The circuit architecture presented has been implemented using Altera Stratix II FPGA technology, utilizing RLDII and QDRII memory components. The circuit can provide fine granularity Quality of Service (QoS) support at a line throughput rate of 12.8Gb/s in its current implementation. The authors suggest that, due to the flexible and scalable modular circuit design approach used, the current circuit architecture can be targeted for a full ASIC implementation to deliver 50 Gb/s throughput. The circuit itself comprises three main components; a WFQ algorithm computation circuit, a tag/time-stamp sort and retrieval circuit, and a high throughput shared buffer. The circuit targets the support of emerging wireline and wireless network nodes that focus on Service Level Agreements (SLA's) and Quality of Experience.

Dispelling the Myth of the Naive Investor during the British Railway Mania, 1845–46

Anecdotal evidence from the British Railway Mania and other historical financial bubbles suggests that many investors during such episodes are naive, thus contributing to the asset price boom. Using extensive investor records, we find that very few investors during the Railway Mania can be categorized as such. Although some interpretations of the Mania suggest that naive investors were expropriated by railway insiders, our evidence is inconsistent with this view as railway insiders contributed substantial amounts of capital, and their investments performed no better than those made by other experienced investors.