56 resultados para Texas Instruments TMS320C80 DSP


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Exploiting the underutilisation of variable-length DSP algorithms during normal operation is vital, when seeking to maximise the achievable functionality of an application within peak power budget. A system level, low power design methodology for FPGA-based, variable length DSP IP cores is presented. Algorithmic commonality is identified and resources mapped with a configurable datapath, to increase achievable functionality. It is applied to a digital receiver application where a 100% increase in operational capacity is achieved in certain modes without significant power or area budget increases. Measured results show resulting architectures requires 19% less peak power, 33% fewer multipliers and 12% fewer slices than existing architectures.

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Support for family caregivers is a core function of palliative care. However, there is a lack of consistency in the way needs are assessed, few longitudinal studies to examine the impact of caregiving, and a dearth of evidence-based interventions. In order to help redress this situation, identification of suitable instruments to examine the caregiving experience and the effectiveness of interventions is required. A systematic literature review was undertaken incorporating representatives of the European Association for Palliative Care’s International Palliative Care Family Caregiver Research Collaboration and Family Carer Taskforce. The aim of the review was to identify articles that described the use of instruments administered to family caregivers of palliative care patients (pre and post-bereavement). Fourteen of the 62 instruments targeted satisfaction with service delivery and less than half were developed specifically for the palliative care context. In approximately 25% of articles psychometric data were not reported. Where psychometric results were reported, validity data were reported in less than half (42%) of these cases. While a considerable variety of instruments have been administered to family caregivers, the validity of some of these requires further consideration. We recommend that others be judicious before developing new instruments for this population.

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At the outset of a discussion of evaluating digital musical instruments, that is to say instruments whose sound generators are digital and separable though not necessarily separate from their control interfaces (Malloch, 2006), it is reasonable to ask what the term evaluation in this context really means. After all, there may be many perspectives from which to view the effectiveness or otherwise of the instruments we build. For most performers, performance on an instrument becomes a means of evaluating how well it functions in the context of live music making, and their measure of success is the response of the audience to their performance. Audiences evaluate performances on the basis of how engaged they feel they have been by what they have seen and heard. When questioned, they are likely to describe good performances as “exciting,” “skillful,” “musical.” Bad performances are “boring,” and those which are marred by technical malfunction are often dismissed out of hand. If performance is considered to be a valid means of evaluating a musical instrument, then it follows that, for the field of DMI design, a much broader definition of the term “evaluation” than that typically used in human-computer interaction (HCI) is required to reflect the fact that there are a number of stakeholders involved in the design and evaluation of DMIs. In addition to players and audiences, there are also composers, instrument builders, component manufacturers, and perhaps even customers, each of whom will have a different concept of what is meant by “evaluation.”

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The purpose of this paper is to review recent developments in the design and fabrication of Frequency Selective Surfaces (FSS) which operate above 300 GHz. These structures act as free space electromagnetic filters and as such provide passive remote sensing instruments with multispectral capability by separating the scene radiation into separate frequency channels. Significant advances in computational electromagnetics, precision micromachining technology and metrology have been employed to create state of the art FSS which enable high sensitivity receivers to detect weak molecular emissions at THz wavelengths. This new class of quasi-optical filter exhibits an insertion loss

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This paper investigates numerical simulation of a string coupled
transversely to a resonant body. Starting from a complete nite
difference formulation, a second model is derived in which the
body is represented in modal form. The main advantage of this hybrid form is that the body model is scalable, i.e. the computational
complexity can be adjusted to the available processing power. Numerical results are calculated and discussed for simplied models
in the form of string-string coupling and string-plate coupling.

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This paper describes the design, application, and evaluation of a user friendly, flexible, scalable and inexpensive Advanced Educational Parallel (AdEPar) digital signal processing (DSP) system based on TMS320C25 digital processors to implement DSP algorithms. This system will be used in the DSP laboratory by graduate students to work on advanced topics such as developing parallel DSP algorithms. The graduating senior students who have gained some experience in DSP can also use the system. The DSP laboratory has proved to be a useful tool in the hands of the instructor to teach the mathematically oriented topics of DSP that are often difficult for students to grasp. The DSP laboratory with assigned projects has greatly improved the ability of the students to understand such complex topics as the fast Fourier transform algorithm, linear and circular convolution, the theory and design of infinite impulse response (IIR) and finite impulse response (FIR) filters. The user friendly PC software support of the AdEPar system makes it easy to develop DSP programs for students. This paper gives the architecture of the AdEPar DSP system. The communication between processors and the PC-DSP processor communication are explained. The parallel debugger kernels and the restrictions of the system are described. The programming in the AdEPar is explained, and two benchmarks (parallel FFT and DES) are presented to show the system performance.

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Advances in silicon technology have been a key development in the realisation of many telecommunication and signal processing systems. In many cases, the development of application-specific digital signal processing (DSP) chips is the most cost-effective solution and provides the highest performance. Advances made in computer-aided design (CAD) tools and design methodologies now allow designers to develop complex chips within months or even weeks. This paper gives an insight into the challenges and design methodologies of implementing advanced highperformance chips for DSP. In particular, the paper reviews some of the techniques used to develop circuit architectures from high-level descriptions and the tools which are then used to realise silicon layout.

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