30 resultados para SIGE
Resumo:
A compact differential 4-way power combiner with 2.3 dB loss and high common-mode rejection characteristic for use in mm-wave PAs is presented. A complete circuit comprised of a power splitter, two-stage cascode PA array, and a power combiner was implemented in SiGe technology. Measured small-signal gain of at least 17 dB was obtained from 74.5 GHz to 80.5 GHz with a peak 21 dB at 79 GHz. The prototype delivered 13.2 dBm P1dB and 14.3 dBm Psat when operated from a single 3.3 V supply at 75 GHz.
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The design of a two-stage differential cascode power amplifier (PA) for 81-86 GHz E-band applications is presented. The PA was realised in SiGe technology with fT/fmax 170/250 GHz. A broadband transformer with efficiency higher than 79.4% from 71 GHz to 96 GHz is used as a BALUN. The PA delivers a 4.5 dBm saturated output power and exhibits a 13.4 dB gain at 83.6 GHz. The input and output return losses agree well with the design specifications.
Resumo:
This paper describes the design, implementation, and characterization of a new type of passive power splitting and combining structure for use in a differential four-way power-combining amplifier operating at E-band. In order to achieve lowest insertion loss, input and output coils inductances are resonated with shunt capacitances. Simple C-L-C and L-C networks are proposed in order to compensate inductive loading due to routing line that would otherwise introduce mismatch and increase loss. Across 78-86 GHz band, measured insertion loss is about 7 dB. Measured return losses are >10 dB from 73 GHz to 94 GHz at the input port and >9 dB from 60 GHz to 94 GHz at the output port. When integrated with driver and power amplifier cells, the simulated complete circuit exhibits 18.2 dB gain and 20.3 dBm saturated output power.
Resumo:
A V-band wide tuning-range VCO and high frequency divide-by-8 frequency divider using Infineon 0.35 µm SiGe HBT process are presented in this paper. An LC impedance peaking technique is introduced in the Miller divider to increase the sensitivity and operation frequency range of the frequency divider. Two static frequency dividers implemented using current mode logic are used to realize dividing by 4 in the circuit. The wide tuning range VCO operates from 51.9 to 64.1 GHz i.e. 20.3% frequency tuning range. The measured phase noise at the frequency divider output stage is around -98.5 dBc at 1 MHz. The circuit consumes 200mW and operates from a 3.5Vdc supply, and occupies 0.6×0.8 mm2 die area.
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This paper presents the design of a novel 8-way power-combining transformer for use in mm-wave power amplifier (PA). The combiner exhibits a record low insertion loss of 1.25 dB at 83.5 GHz. A complete circuit comprised of a power splitter, two-stage cascode PA array, a power combiner and input/output matching elements was designed and realized in SiGe technology. Measured gain of at least 16.8 dB was obtained from 76.4 GHz to 85.3 GHz with a peak 19.5 dB at 83 GHz. The prototype delivered 12.5 dBm OP and 14 dBm saturated output power when operated from a 3.2 V DC supply voltage at 78 GHz. © 2013 IEEE.
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Novel CVD WSi2 technology with low series and contact resistance in SiGe HBTs was achieved. Specific contact resistance to Si1-xGex with 0
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Chapter eleven on Mm-wave broadband wireless systems and enabling MMIC technologies, is contributed by Jian Zhang, Mury Thian, Guochi Huang, George Goussetis and Vincent F. Fusco, from Queen's University Belfast, UK. Millimeter wave bands provide large available bandwidths for high data rate wireless communication systems, which are envisaged to shift data throughput well in the GBps range. This capability has over past few years driven rapid developments in the technology underpinning broadband wireless systems as well as in the standardisation activity from various non-governmental consortia and the band allocation from spectrum regulators globally. This chapter provides an overview of the recent developments on V-band broadband wireless systems with the emphasis placed on enabling MMIC technologies. An overview of the key applications and available standards is presented. System-level architectures for broadband wireless applications are being reviewed. Examples of analysis, design and testing on MMIC components in SiGe BiCMOS are presented and the outlook of the technology is discussed.
Resumo:
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A compact V-band active power detector using Infineon 0.35 µm SiGe HBT process (fT/fmax =170/250 GHz) is described. The total chip area is only 0.35×0.8 mm2 including all pads. This design exhibits a dynamic range larger than 20 dB over the frequency range from 55 GHz to 67 GHz. It also offers a simple and low-power application potential as an envelop detector in multi-Gbps high data rate demodulators for OOK/ASK etc.
Resumo:
This paper presents the design and implementation of a differential 4-way power-combining amplifier operating at E-band. The proposed 4-way power combiner (4WPC) facilitates short interconnects to the PA cells, thereby resulting in reduced loss. Simple C-L-C and L-C networks are deployed in order to compensate inductive loading due to the routing lines that would otherwise introduce mismatch and subsequently increase overall loss. Realized in SiGe technology, the PA prototype delivered 13.2 dBm output-referred 1-dB compression point and 14.3 dBm saturated output power when operated from a single 3.3 V DC supply at 75 GHz.
Resumo:
To alleviate practical limitations in the design of mm-wave on-chip image-reject filters, systematic design methodologies are presented. Three low-order filters with high-selectivity and low-loss characteristics are designed and compared. Transmission zeroes are created by means of a quarter-wave transmission line (filter 1) and a series LC resonator (filters 2 and 3). Implemented on SiGe, the filters occupy 0.125, 0.064, and 0.079 mm2 chip area including pads. The measured transmission
losses across 81-86 GHz E-Band frequency range are 3.6-5.2 dB for filter 1, 3.1-4.7 dB for filter 2 and 3.6-5 dB for filter 3 where rejection levels at the image band are greater than 30 dB.
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The implementation of a dipole antenna co-designed and monolithically integrated with a low noise amplifier (LNA) on low resistivity Si substrate (20 Omega . cm) manufactured in 0.35 mu m commercial SiGe HBT process with f(T)/f(max) of 170 GHz and 250 GHz is investigated theoretically and experimentally. An air gap is introduced between the chip and a reflective ground plane, leading to substantial improvements in efficiency and gain. Moreover, conjugate matching conditions between the antenna and the LNA are exploited, enhancing power transfer between without any additional matching circuit. A prototype is fabricated and tested to validate the performance. The measured 10-dB gain of the standalone LNA is centered at 58 GHz with a die size of 0.7 mm x 0.6 mm including all pads. The simulated results showed antenna directivity of 5.1 dBi with efficiency higher than 70%. After optimization, the co-designed LNA-Antenna chip with a die size of 3 mm x 2.8 mm was characterized in anechoic chamber environment. A maximum gain of higher than 12 dB was obtained.
Resumo:
A simple circuit that is able to indicate if an injection-locked oscillator is in the locked condition by providing a ‘high’ or ‘low’ output is presented. The detector is compatible with most injection-locked oscillators as all that is required is access to the low-frequency bias circuit, with no direct access needed to the RF/microwave signals. To prove the universal nature of the lock detector it is successfully demonstrated practically for two scenarios: (i) a 1 GHz injection-locked VCO and (ii) a 60 GHz SiGe VCO MMIC.