IMPLEMENTATION OF SIGNAL PROCESSING FUNCTIONS USING 1-BIT SYSTOLIC ARRAYS.

The use of systolic arrays of 1-bit cells to implement a range of important signal processing functions is demonstrated. Two examples, a pipelined multiplier and a pipelined bit-slice transform circuit, are given. This approach has many important implications for silicon technology, and these are outlined.

DESIGNING VLSI SIGNAL PROCESSING CHIPS USING DATA DEPENDENCE GRAPHS.

The highly structured nature of many digital signal processing operations allows these to be directly implemented as regular VLSI circuits. This feature has been successfully exploited in the design of a number of commercial chips, some examples of which are described. While many of the architectures on which such chips are based were originally derived on heuristic basis, there is an increasing interest in the development of systematic design techniques for the direct mapping of computations onto regular VLSI arrays. The purpose of this paper is to show how the the technique proposed by Kung can be readily extended to the design of VLSI signal processing chips where the organisation of computations at the level of individual data bits is of paramount importance. The technique in question allows architectures to be derived using the projection and retiming of data dependence graphs.

A co-operative formation-based collision avoidance approach for a group of autonomous vehicles (Special Issue on Adaptive Control and Signal Processing in Marine System)

This paper employs a unique decentralised cooperative control method to realise a formation-based collision avoidance strategy for a group of autonomous vehicles. In this approach, the vehicles' role in the formation and their alert and danger areas are first defined, and the formation-based intra-group and external collision avoidance methods are then proposed to translate the collision avoidance problem into the formation stability problem. The extension–decomposition–aggregation formation control method is next employed to stabilise the original and modified formations, whilst manoeuvring, and subsequently solve their collision avoidance problem indirectly. Simulation study verifies the feasibility and effectiveness of the intra-group and external collision avoidance strategy. It is demonstrated that both formation control and collision avoidance problems can be simultaneously solved if the stability of the expanded formation including external obstacles can be satisfied.

From bit level systolic arrays to HDTV processor chips

The paper starts presents the work initially carried out by Queen's University and RSRE (now Qinetiq) in the development of advanced architectures and microchips based on systolic array architectures. The paper outlines how this has led to the development of highly complex designs for high definition TV and highlights work both on advanced signal processing architectures and tool flows for advanced systems. © 2006 IEEE.