Very high speed 17 Gbps SHACAL encryption architecture

Very high speed and low area hardware architectures of the SHACAL-1 encryption algorithm are presented in this paper. The SHACAL algorithm was a submission to the New European Schemes for Signatures, Integrity and Encryption (NESSIE) project and it is based on the SHA-1 hash algorithm. To date, there have been no performance metrics published on hardware implementations of this algorithm. A fully pipelined SHACAL-1 encryption architecture is described in this paper and when implemented on a Virtex-II X2V4000 FPGA device, it runs at a throughput of 17 Gbps. A fully pipelined decryption architecture achieves a speed of 13 Gbps when implemented on the same device. In addition, iterative architectures of the algorithm are presented. The SHACAL-1 decryption algorithm is derived and also presented in this paper, since it was not provided in the submission to NESSIE. © Springer-Verlag Berlin Heidelberg 2003.

OpenFlow Multi-Table Lookup Architecture for Multi-Gigabit Software Defined Networking (SDN)

The proposed multi-table lookup architecture provides SDN-based, high-performance packet classification in an OpenFlow v1.1+ SDN switch. The objective of the demonstration is to show the functionality of the architecture deployed on the NetFPGA SUME Platform.

Network Connectivity Proxy: Architecture, Implementation, and Performance Analysis

Several studies in the last decade have pointed out that many devices, such as computers, are often left powered on even when idle, just to make them available and reachable on the network, leading to large energy waste. The concept of network connectivity proxy (NCP) has been proposed as an effective means to improve energy efficiency. It impersonates the presence of networked devices that are temporally unavailable, by carrying out background networking routines on their behalf. Hence, idle devices could be put into low-power states and save energy. Several architectural alternatives and the applicability of this concept to different protocols and applications have been investigated. However, there is no clear understanding of the limitations and issues of this approach in current networking scenarios. This paper extends the knowledge about the NCP by defining an extended set of tasks that the NCP can carry out, by introducing a suitable communication interface to control NCP operation, and by designing, implementing, and evaluating a functional prototype.

State architecture: subsidiarity, devolution, federalism and independence

This chapter examines the current ‘architecture’ of the British state, in particular the way in which governmental power is distributed among the nations of the United Kingdom. The theme of this chapter will be to show how the continuing (and, as James Bryce argued, inevitable) tension between centripetal and centrifugal forces can be usefully applied to power relations between the various nations of the United Kingdom, and between these nations and Europe, providing a basis for analyzing how these nations are drawn or impelled by some forces towards a centralized unitary polity, whilst at the same time other forces tend towards dispersion of power. The resulting pattern might be analyzed along a spectrum from centralization to independence, with subsidiarity, devolution and federalism being seen as weigh stations along the way, but given how complex the variations in the distribution of power between these nations and the centre have become over time, the construction of any static architectural blueprint of the British state is bound to be misleading. Indeed, the architectural metaphor, with its implications of stability might usefully be rethought.

Architecture as Pedagogy: Alive and Kicking

This workshop draws on an emerging collaborative body of research by Lovett, Morrow and McClean that aims to understand architecture and its processes as a form of pedagogical practice: a civic pedagogy.

Architectural education can be valued not only as a process that delivers architecture-specific skills and knowledges, but also as a process that transforms people into critically active contributors to society. We are keen to examine how and where those skills are developed in architectural education and trace their existence and/or application within practice. We intend to examine whether some architectural and spatial practices are intrinsically pedagogical in their nature and how the level of involvement of clients, users and communities can mimic the project-based learning of architectural education – in particularly in the context of ‘live project learning’

1. This workshop begins with a brief discussion paper from Morrow that sets out the arguments behind why and how architecture can be understood as pedagogy. It will do so by presenting firstly the relationship between architectural practice and pedagogy, drawing out both contemporary and historical examples of architecture and architects acting pedagogically. It will also consider some other forms of creative practice that explicitly frame themselves pedagogically, and focus on participatory approaches in architectural practice that overlap with inclusive and live pedagogies, concluding with a draft and tentative abstracted pedagogical framework for architectural practice.

2. Lovett will examine practices of architectural operation that have a pedagogical approach, or which recognise within themselves an educational subtext/current. He is most interested in a 'liveness' beyond the 'Architectural Education' of university institutions. The presentation will question the scope for both spatial empowerment / agency and a greater understanding and awareness of the value of good design when operating as architects with participant-clients younger than 18, older than 25 or across varied parts of society. Positing that the learning might be greatest when there are no prescribed 'Learning Outcomes' and that such work might depend on risk-taking and playfulness, the presentation will be a curated showcase drawing on his own ongoing work.

Both brief presentations will inform the basis of the workshop’s discussion which hopes to draw on participants views and expereinces to enrich the research process. The intention is that the overall workshop will lead to a call for contributors and respondents to a forthcoming publication on ‘Architecture as Pedagogy’.

Investigation of thermal resistance and bridging in examples of contemporary and vernacular solid wall architecture

Contemporary architecture has tended to increase envelope insulation levels in an unceasing effort to reduce U-values. Traditional masonry architecture in contrast was devoid of insulation, except for the inherent insulative nature of vernacular materials. Also the consistency of the outer membrane of the building skin diminished any impact due to bridging. In contemporary highly insulated walls bridges are numerous due to the necessity to bind inner and outer structural skins through insulation layers. This paper examines thermal bridging in an example of contemporary façade design and compares it with an example of traditional vernacular architecture currently being researched which is characterized by a lack of bridging elements. Focus is given to heavy weight materials of high thermal mass, which appropriately for passive architecture help moderate fluctuations in internal temperature. In an extensive experimental study samples of highly insulated precast concrete sandwich panels and lime rendered masonry walls are tested in a guarded hot-box. The building construction methods are compared for static and dynamic thermal transmittance, via heat flux and surface temperature differential measurements. Focus is given to the differential heat loss due to the thermal bridging in the sandwich panels and its associated impact on overall heat loss relative to traditional masonry construction.

Unsettling modernity: Shifting values and changing housing styles in the Kathmandu Valley

Abstract

Culture has always been important for the character of the cities, as have the civic and public institutions that sustain a lifestyle and provide an identity. Substantial evidence of the unique historical, urban civilisation remains within the traditional settlements in the Kathmandu Valley in Nepal; manifested in houses, palaces, temples, rest houses, open spaces, festivals, rituals, customs and cultural institutions. Indigenous knowledge and practices prescribed the arrangement of houses, roads and urban spaces giving the city a distinctive physical form, character and a unique oriental nativeness. In technical sense, these societies did not have written rules for guiding development. In recent decades, the urban culture of the city has been changing with the forces of urbanisation and globalisation and the demand for new buildings and spaces. New residential design is increasingly dominated by distinctive patterns of Western suburban ideal comprising detached or semi-detached homes and high rise tower blocks. This architectural iconoclasm can be construed as a rather crude response to the indigenous culture and built form. The paper attempts to dismantle the current tension between traditional and contemporary ‘culture’ (and hence society) and housing (or built form) in the Kathmandu Valley by engaging in a discussion that cuts across space, time and meaning of architecture as we know it.

On the statistical memory architecture exploration and optimization

The worsening of process variations and the consequent increased spreads in circuit performance and consumed power hinder the satisfaction of the targeted budgets and lead to yield loss. Corner based design and adoption of design guardbands might limit the yield loss. However, in many cases such methods may not be able to capture the real effects which might be way better than the predicted ones leading to increasingly pessimistic designs. The situation is even more severe in memories which consist of substantially different individual building blocks, further complicating the accurate analysis of the impact of variations at the architecture level leaving many potential issues uncovered and opportunities unexploited. In this paper, we develop a framework for capturing non-trivial statistical interactions among all the components of a memory/cache. The developed tool is able to find the optimum memory/cache configuration under various constraints allowing the designers to make the right choices early in the design cycle and consequently improve performance, energy, and especially yield. Our, results indicate that the consideration of the architectural interactions between the memory components allow to relax the pessimistic access times that are predicted by existing techniques.

Software defined FFT architecture for IEEE 802.11ac

The upcoming IEEE 802.11ac standard boosts the throughput of previous IEEE 802.11n by adding wider 80 MHz and 160 MHz channels with up to 8 antennas (versus 40 MHz channel and 4 antennas in 802.11n). This necessitates new 1-8 stream 256/512-point Fast Fourier Transform (FFT) / inverse FFT (IFFT) processing with 80/160 MSample/s throughput. Although there are abundant related work, they all fail to meet the requirements of IEEE 802.11ac FFT/IFFT on point size, throughput and multiple data streams at the same time. This paper proposes the first software defined FFT/IFFT architecture as a solution. By making use of a customised soft stream processor on FPGA, we show how a software defined FFT architecture can meet all the requirements of IEEE 802.11ac with low cost and high resource efficiency. When compared with dedicated Xilinx FFT core, our implementation exhibits only one third of the resources also up to three times of resource efficiency.

FPGA based Streaming Image Processing Processor (SIPPro) architecture to accelerate data intensive applications

Current data-intensive image processing applications push traditional embedded architectures to their limits. FPGA based hardware acceleration is a potential solution but the programmability gap and time consuming HDL design flow is significant. The proposed research approach to develop “FPGA based programmable hardware acceleration platform” that uses, large number of Streaming Image processing Processors (SIPPro) potentially addresses these issues. SIPPro is pipelined in-order soft-core processor architecture with specific optimisations for image processing applications. Each SIPPro core uses 1 DSP48, 2 Block RAMs and 370 slice-registers, making the processor as compact as possible whilst maintaining flexibility and programmability. It is area efficient, scalable and high performance softcore architecture capable of delivering 530 MIPS per core using Xilinx Zynq SoC (ZC7Z020-3). To evaluate the feasibility of the proposed architecture, a Traffic Sign Recognition (TSR) algorithm has been prototyped on a Zedboard with the color and morphology operations accelerated using multiple SIPPros. Simulation and experimental results demonstrate that the processing platform is able to achieve a speedup of 15 and 33 times for color filtering and morphology operations respectively, with a significant reduced design effort and time.