Experiment of Digital Directional Modulation Transmitters

A digital directional modulation (DM) transmitter structure is proposed from a practical implementation point of view in this paper. This digital DM architecture is built with the help of several off-the-shelf physical layer wireless experiment platform hardware boards. When compared with previous analogue DM transmitter architectures, the digital means offers more precise and fast control on the updates of the array excitations. More importantly, it is an ideal physical arrangement to implement the most universal DM synthesis algorithm, i.e., the orthogonal vector approach. The practical issues in digital DM system calibrations are described and solved. The bit error rates (BERs) are measured via real-time data transmissions to illustrate the DM advantages, in terms of secrecy performance, over conventional non-DM beam-steering transmitters.

Practical Lattice-Based Digital Signature Schemes

Digital signatures are an important primitive for building secure systems and are used in most real-world security protocols. However, almost all popular signature schemes are either based on the factoring assumption (RSA) or the hardness of the discrete logarithm problem (DSA/ECDSA). In the case of classical cryptanalytic advances or progress on the development of quantum computers, the hardness of these closely related problems might be seriously weakened. A potential alternative approach is the construction of signature schemes based on the hardness of certain lattice problems that are assumed to be intractable by quantum computers. Due to significant research advancements in recent years, lattice-based schemes have now become practical and appear to be a very viable alternative to number-theoretic cryptography. In this article, we focus on recent developments and the current state of the art in lattice-based digital signatures and provide a comprehensive survey discussing signature schemes with respect to practicality. Additionally, we discuss future research areas that are essential for the continued development of lattice-based cryptography.

Digital slide viewing for primary reporting in gastrointestinal pathology: a validation study

Despite the increasing availability of digital slide viewing, and numerous advantages associated with its application, a lack of quality validation studies is amongst the reasons for poor uptake in routine practice. This study evaluated primary digital pathology reporting in the setting of routine subspecialist gastrointestinal pathology, commonplace in most tissue pathology laboratories and representing one of the highest volume specialties in most laboratories. Individual digital and glass slide diagnoses were compared amongst three pathologists reporting in a gastrointestinal subspecialty team, in a prospective series of 100 consecutive diagnostic cases from routine practice in a large teaching hospital laboratory. The study included a washout period of at least 6 months. Discordant diagnoses were classified, and the study evaluated against recent College of American Pathologists (CAP) recommendations for evaluating digital pathology systems for diagnostic use. The study design met all 12 of the CAP recommendations. The 100 study cases generated 300 pairs of diagnoses, comprising 100 glass slide diagnoses and 100 digital diagnoses from each of the three study pathologists. 286 of 300 pairs of diagnoses were concordant, representing intraobserver concordance of 95.3 %, broadly comparable to rates previously published in this field. In ten of the 14 discordant pairs, the glass slide diagnosis was favoured; in four cases, the digital diagnosis was favoured, but importantly, the 14 discordant intraobserver diagnoses were considered to be of minor clinical significance. Interobserver, or viewing modality independent, concordance was found in 94 of the total of 100 study cases, providing a comparable baseline discordance rate expected in any second viewing of pathology material. These overall results support the safe use of digital pathology in primary diagnostic reporting in this setting

A high performance IIR digital filter chip

The design of a high-performance IIR (infinite impulse response) digital filter is described. The chip architecture operates on 11-b parallel, two's complement input data with a 12-b parallel two's complement coefficient to produce a 14-b two's complement output. The chip is implemented in 1.5-µm, double-layer-metal CMOS technology, consumes 0.5 W, and can operate up to 15 Msample/s. The main component of the system is a fine-grained systolic array that internally is based on a signed binary number representation (SBNR). Issues addressed include testing, clock distribution, and circuitry for conversion between two's complement and SBNR.