Luminescent Photoinduced Electron Transfer (PET) Molecules for Sensing and Logic Operations

Chemical species can serve as inputs to supramolecular devices so that a luminescence output is created in a conditional manner. Conditionality is built into these devices by employing the classical photochemical process of photoinduced electron transfer (PET) to compete with luminescence emission. The response of these devices in the analogue regime leads to sensors that can operate in nanometric, micrometric, and millimetric spaces. Some of these devices serve in membrane science, cell physiology, and medical diagnostics. The response in the digital regime leads to Boolean logic gates. Some of these find application in improving aspects of medical diagnostics and in identifying small objects in large populations.

Molecular Logic Gates and Luminescent Sensors Based on Photoinduced Electron Transfer

The competition between Photoinduced electron transfer (PET) and other de-excitation pathways such as fluorescence and phosphorescence can be controlled within designed molecular structures. Depending on the particular design, the resulting optical output is thus a function of various inputs such as ion concentration and excitation light dose. Once digitized into binary code, these input-output patterns can be interpreted according to Boolean logic. The single-input logic types of YES and NOT cover simple sensors and the double- (or higher-) input logic types represent other gates such as AND and OR. The logic-based arithmetic processors such as half-adders and half-subtractors are also featured. Naturally, a principal application of the more complex gates is in multi-sensing contexts.

AND Logic Gates Based on Small Molecules with Chemical Inputs and Luminescence Output

AND logic gate behaviour can be recognized in chemical-responsive luminescence phenomena concerning small molecules. Though initial developments concerned separate and distinguishable chemical species as inputs, consideration of other types of input sets allows substantial expansion of the sub-field. Dissection of these molecular devices into modules, where possible, enables analysis of their logic behaviour according to supramolecular photochemical mechanisms.

Molecular Logic Gate Arrays

Chemists are now able to emulate the ideas and instruments of mathematics and computer science with molecules. The integration of molecular logic gates into small arrays has been a growth area during the last few years. The design principles underlying a collection of these cases are examined. Some of these computing molecules are applicable in medical- and biotechnologies. Cases of blood diagnostics, 'lab-on-a-molecule' systems, and molecular computational identification of small objects are included.

Generation and control of ultrafast pulse trains for quasi-phase-matching high-harmonic generation

Two techniques are demonstrated to produce ultrashort pulse trains capable of quasi-phase-matching high-harmonic generation. The first technique makes use of an array of birefringent crystals and is shown to generate high-contrast pulse trains with constant pulse spacing. The second technique employs a grating-pair stretcher, a multiple-order wave plate, and a linear polarizer. Trains of up to 100 pulses are demonstrated with this technique, with almost constant inter-pulse separation. It is shown that arbitrary pulse separation can be achieved by introducing the appropriate dispersion. This principle is demonstrated by using an acousto-optic programmable dispersive filter to introduce third-and fourth-order dispersions leading to a linear and quadratic variation of the separation of pulses through the train. Chirped-pulse trains of this type may be used to quasi-phase-match high-harmonic generation in situations where the coherence length varies through the medium. (C) 2010 Optical Society of America

Generation of a train of ultrashort pulses from a compact birefringent crystal array

A linear array of n calcite crystals is shown to allow the generation of a high contrast (> 10: 1) train of 2(n) high energy (> 100 mu J) pulses from a single ultrafast laser pulse. Advantage is taken of the pulse-splitting properties of a single birefringent crystal, where an incident laser pulse can be split into two pulses with orthogonal polarizations and equal intensity, separated temporally in proportion to the thickness of the crystal traversed and the difference in refractive indices of the two optic axes. In the work presented here an array of seven calcite crystals of sequentially doubled thickness is used to produce a train of 128 pulses, each of femtosecond duration. Readily versatile properties such as the number of pulses in the train and variable mark-space ratio are realized from such a setup. (c) 2007 Optical Society of America

FPGA Implementations of the Round Two SHA-3 Candidates

The second round of the NIST-run public competition is underway to find a new hash algorithm(s) for inclusion in the NIST Secure Hash Standard (SHA-3). This paper presents the full implementations of all of the second round candidates in hardware with all of their variants. In order to determine their computational efficiency, an important aspect in NIST's round two evaluation criteria, this paper gives an area/speed comparison of each design both with and without a hardware interface, thereby giving an overall impression of their performance in resource constrained and resource abundant environments. The implementation results are provided for a Virtex-5 FPGA device. The efficiency of the architectures for the hash functions are compared in terms of throughput per unit area. To the best of the authors' knowledge, this is the first work to date to present hardware designs which test for all message digest sizes (224, 256, 384, 512), and also the only work to include the padding as part of the hardware for the SHA-3 hash functions.

Field-programmable true random number generator

True random number generation is crucial in hardware security applications. Proposed is a voltage-controlled true random number generator that is inherently field-programmable. This facilitates increased entropy as a randomness source because there is more than one configuration state which lends itself to more compact and low-power architectures. It is evaluated through electrical characterisation and statistically through industry-standard randomness tests. To the best of the author's knowledge, it is one of the most efficient designs to date with respect to hardware design metrics.

Modelling and Control of Shape Memory Alloy Actuators by using Preisach Model, Genetic Algorithm and Fuzzy Logic

Shapememoryalloy (SMA) actuators, which have the ability to return to a predetermined shape when heated, have many potential applications in aeronautics, surgical tools, robotics and so on. Nonlinearity hysteresis effects existing in SMA actuators present a problem in the motion control of these smart actuators. This paper investigates the control problem of SMA actuators in both simulation and experiment. In the simulation, the numerical Preisachmodel with geometrical interpretation is used for hysteresis modeling of SMA actuators. This model is then incorporated in a closed loop PID control strategy. The optimal values of PID parameters are determined by using geneticalgorithm to minimize the mean squared error between desired output displacement and simulated output. However, the control performance is not good compared with the simulation results when these parameters are applied to the real SMA control since the system is disturbed by unknown factors and changes in the surrounding environment of the system. A further automated readjustment of the PID parameters using fuzzylogic is proposed for compensating the limitation. To demonstrate the effectiveness of the proposed controller, real time control experiment results are presented.

Software-defined sphere decoding for FPGA-based MIMO detection

Sphere Decoding (SD) is a highly effective detection technique for Multiple-Input Multiple-Output (MIMO) wireless communications receivers, offering quasi-optimal accuracy with relatively low computational complexity as compared to the ideal ML detector. Despite this, the computational demands of even low-complexity SD variants, such as Fixed Complexity SD (FSD), remains such that implementation on modern software-defined network equipment is a highly challenging process, and indeed real-time solutions for MIMO systems such as 4 4 16-QAM 802.11n are unreported. This paper overcomes this barrier. By exploiting large-scale networks of fine-grained softwareprogrammable processors on Field Programmable Gate Array (FPGA), a series of unique SD implementations are presented, culminating in the only single-chip, real-time quasi-optimal SD for 44 16-QAM 802.11n MIMO. Furthermore, it demonstrates that the high performance software-defined architectures which enable these implementations exhibit cost comparable to dedicated circuit architectures.

Embedded C programming: a practical course introducing programmable microprocessors

This paper presents a new laboratory-based module for embedded systems teaching, which addresses the current lack of consideration for the link between hardware development, software implementation, course content and student evaluation in a laboratory environment. The course introduces second year undergraduate students to the interface between hardware and software and the programming of embedded devices; in this case, the PIC (originally peripheral interface controller, later rebranded programmable intelligent computer) microcontroller. A hardware development board designed for use in the laboratories of this module is presented. Through hands on laboratory experience, students are encouraged to engage with practical problem-solving exercises and develop programming skills across a broad range of scenarios.