Computational modeling techniques for reliability of electronic components on printed circuit boards

This paper describes modeling technology and its use in providing data governing the assembly and subsequent reliability of electronic chip components on printed circuit boards (PCBs). Products, such as mobile phones, camcorders, intelligent displays, etc., are changing at a tremendous rate where newer technologies are being applied to satisfy the demands for smaller products with increased functionality. At ever decreasing dimensions, and increasing number of input/output connections, the design of these components, in terms of dimensions and materials used, is playing a key role in determining the reliability of the final assembly. Multiphysics modeling techniques are being adopted to predict a range of interacting physics-based phenomena associated with the manufacturing process. For example, heat transfer, solidification, marangoni fluid flow, void movement, and thermal-stress. The modeling techniques used are based on finite volume methods that are conservative and take advantage of being able to represent the physical domain using an unstructured mesh. These techniques are also used to provide data on thermal induced fatigue which is then mapped into product lifetime predictions.

Review of the technology and reliability issues arising as optical interconnects migrate onto the circuit board

Light has the greatest information carrying potential of all the perceivable interconnect mediums; consequently, optical fiber interconnects rapidly replaced copper in telecommunications networks, providing bandwidth capacity far in excess of its predecessors. As a result the modern telecommunications infrastructure has evolved into a global mesh of optical networks with VCSEL’s (Vertical Cavity Surface Emitting Lasers) dominating the short-link markets, predominately due to their low-cost. This cost benefit of VCSELs has allowed optical interconnects to again replace bandwidth limited copper as bottlenecks appear on VSR (Very Short Reach) interconnects between co-located equipment inside the CO (Central-Office). Spurred by the successful deployment in the VSR domain and in response to both intra-board backplane applications and inter-board requirements to extend the bandwidth between IC’s (Integrated Circuits), current research is migrating optical links toward board level USR (Ultra Short Reach) interconnects. Whilst reconfigurable Free Space Optical Interconnect (FSOI) are an option, they are complicated by precise line-of-sight alignment conditions hence benefits exist in developing guided wave technologies, which have been classified into three generations. First and second generation technologies are based upon optical fibers and are both capable of providing a suitable platform for intra-board applications. However, to allow component assembly, an integral requirement for inter-board applications, 3rd generation Opto-Electrical Circuit Boards (OECB’s) containing embedded waveguides are desirable. Currently, the greatest challenge preventing the deployment of OECB’s is achieving the out-of-plane coupling to SMT devices. With the most suitable low-cost platform being to integrate the optics into the OECB manufacturing process, several research avenues are being explored although none to date have demonstrated sufficient coupling performance. Once in place, the OECB assemblies will generate new reliability issues such as assembly configurations, manufacturing tolerances, and hermetic requirements that will also require development before total off-chip photonic interconnection can truly be achieved

Large scale parallel simulations for the assembly of a flip-chip component to a printed circuit

Abstract not available

Numerical modelling of solder joint formation

Solder materials are used to provide a connection between electronic components and printed circuit boards (PCBs) using either the reflow or wave soldering process. As a board assembly passes through a reflow furnace the solder (initially in the form of solder paste) melts, reflows, then solidifies, and finally deforms between the chip and board. A number of defects may occur during this process such as flux entrapment, void formation, and cracking of the joint, chip or board. These defects are a serious concern to industry, especially with trends towards increasing component miniaturisation and smaller pitch sizes. This paper presents a modelling methodology for predicting solder joint shape, solidification, and deformation (stress) during the assembly process.

Material properties, geometry and their effect on the fatigue life of two flip-chip models

This paper describes how modeling technology has been used in providing fatigue life time data of two flip-chip models. Full-scale three-dimensional modeling of flip-chips under cyclic thermal loading has been combined with solder joint stand-off height prediction to analyze the stress and strain conditions in the two models. The Coffin-Manson empirical relationship is employed to predict the fatigue life times of the solder interconnects. In order to help designers in selecting the underfill material and the printed circuit board, the Young's modulus and the coefficient of thermal expansion of the underfill, as well as the thickness of the printed circuit boards are treated as variable parameters. Fatigue life times are therefore calculated over a range of these material and geometry parameters. In this paper we will also describe how the use of micro-via technology may affect fatigue life

Mechanism of motion of an optical fiber aligned by a solder droplet

Solder is often used as an adhesive to attach optical fibers to a circuit board. In this proceeding we will discuss efforts to model the motion of an optical fiber during the wetting and solidification of the adhesive solder droplet. The extent of motion is determined by several competing forces, during three “stages” of solder joint formation. First, capillary forces of the liquid phase control the fiber position. Second, during solidification, the presence of the liquid-solid-vapor triple line as well as a reduced liquid solder volume leads to a change in the net capillary force on the optical fiber. Finally, the solidification front itself impinges on the fiber. Publicly-available finite element models are used to calculate the time-dependent position of the solidification front and shape of the free surface.

Modelling the performance of lead-Free solder interconnects for copper bumped flip-chip devices

Traditionally, before flip chips can be assembled the dies have to be attached with solder bumps. This process involves the deposition of metal layers on the Al pads on the dies and this is called the under bump metallurgy (UBM). In an alternative process, however, Copper (Cu) columns can be used to replace solder bumps and the UBM process may be omitted altogether. After the bumping process, the bumped dies can be assembled on to the printed circuit board (PCB) by using either solder or conductive adhesives. In this work, the reliability issues of flip chips with Cu column bumped dies have been studied. The flip chip lifetime associated with the solder fatigue failure has been modeled for a range of geometric parameters. The relative importance of these parameters is given and solder volume has been identified as the most important design parameter for long-term reliability. Another important problem that has been studied in this work is the dissolution of protection metals on the pad and Cu column in the reflow process. For small solder joints the amount of Cu which dissolves into the molten solder after the protection layers have worn out may significantly affect solder joint properties.

Correlation of solder paste rheology with computational simulations of the stencil printing process

Soldering technologies continue to evolve to meet the demands of the continuous miniaturisation of electronic products, particularly in the area of solder paste formulations used in the reflow soldering of surface mount devices. Stencil printing continues to be a leading process used for the deposition of solder paste onto printed circuit boards (PCBs) in the volume production of electronic assemblies, despite problems in achieving a consistent print quality at an ultra-fine pitch. In order to eliminate these defects a good understanding of the processes involved in printing is important. Computational simulations may complement experimental print trials and paste characterisation studies, and provide an extra dimension to the understanding of the process. The characteristics and flow properties of solder pastes depend primarily on their chemical and physical composition and good material property data is essential for meaningful results to be obtained by computational simulation.This paper describes paste characterisation and computational simulation studies that have been undertaken through the collaboration of the School of Aeronautical, Mechanical and Manufacturing Engineering at Salford University and the Centre for Numerical Modelling and Process Analysis at the University of Greenwich. The rheological profile of two different paste formulations (lead and lead-free) for sub 100 micron flip-chip devices are tested and applied to computational simulations of their flow behaviour during the printing process.

Thermal, mechanical and optical modelling of VCSEL packaging

Hybrid OECB (Opto-Electrical Circuit Boards) are expected to make a significant impact in the telecomm switches arena within the next five years, creating optical backplanes with high speed point-to-point optical interconnects. OECB's incorporate short range optical interconnects, and are based on VCSEL (Vertical Cavity Surface Emitting Diode) and PD (Photo Diode) pairs, connected to each other via embedded waveguides in the OECB. The VCSEL device is flip-chip assembled onto an organic substrate with embedded optical waveguides. The performance of the VCSEL device is governed by the thermal, mechanical and optical characteristics of this assembly. During operation, the VCSEL device will heat up and the thermal change together with the CTE mismatch in the materials, will result in potential misalignment between the VCSEL apertures and the waveguide openings in the substrate. Any degree of misalignment will affect the optical performance of the package. This paper will present results from a highly coupled modelling analysis involving thermal, mechanical and optical models. The paper will also present results from an optimisation analysis based on Design of Experiments (DOE).

Polymer waveguide and VCSEL array multi-physics modelling for OECB based optical backplanes [opto-electrical circuit boards]

The deployment of OECBs (opto-electrical circuit boards) is expected to make a significant impact in the telecomm switches arena within the next five years. This will create optical backplanes with high speed point-to-point optical interconnects. The crucial aspect in the manufacturing process of the optical backplane is the successful coupling between VCSEL (vertical cavity surface emitting laser) device and embedded waveguide in the OECB. The results from a thermo-mechanical analysis are being used in a purely optical model, which solves optical energy and attenuation from the VCSEL aperture into, and then through, the waveguide. Results from the modelling are being investigated using DOE analysis to identify packaging parameters that minimise misalignment. This is achieved via a specialist optimisation software package. Results from the thermomechanical and optical models are discussed as are experimental results from the DOE.

Nonlinear MHD stability of aluminium reduction cells

An industrial electrolysis cell used to produce primary aluminium is sensitive to waves at the interface of liquid aluminium and electrolyte. The interface waves are similar to stratified sea layers [1], but the penetrating electric current and the associated magnetic field are intricately involved in the oscillation process, and the observed wave frequencies are shifted from the purely hydrodynamic ones [2]. The interface stability problem is of great practical importance because the electrolytic aluminium production is a major electrical energy consumer, and it is related to environmental pollution rate. The stability analysis was started in [3] and a short summary of the main developments is given in [2]. Important aspects of the multiple mode interaction have been introduced in [4], and a widely used linear friction law first applied in [5]. In [6] a systematic perturbation expansion is developed for the fluid dynamics and electric current problems permitting reduction of the three-dimensional problem to a two dimensional one. The procedure is more generally known as “shallow water approximation” which can be extended for the case of weakly non-linear and dispersive waves. The Boussinesq formulation permits to generalise the problem for non-unidirectionally propagating waves accounting for side walls and for a two fluid layer interface [1]. Attempts to extend the electrolytic cell wave modelling to the weakly nonlinear case have started in [7] where the basic equations are derived, including the nonlinearity and linear dispersion terms. An alternative approach for the nonlinear numerical simulation for an electrolysis cell wave evolution is attempted in [8 and references there], yet, omitting the dispersion terms and without a proper account for the dissipation, the model can predict unstable waves growth only. The present paper contains a generalisation of the previous non linear wave equations [7] by accounting for the turbulent horizontal circulation flows in the two fluid layers. The inclusion of the turbulence model is essential in order to explain the small amplitude self-sustained oscillations of the liquid metal surface observed in real cells, known as “MHD noise”. The fluid dynamic model is coupled to the extended electromagnetic simulation including not only the fluid layers, but the whole bus bar circuit and the ferromagnetic effects [9].

Modeling the effect of lead-free soldering on flexible substrates

Flexible Circuit Boards (FPCs) are now being widely used in the electronic industries especially in the areas of electronic packages. Due to European lead-free legislation which has been implemented since July 2006, electronic packaging industries have to switch to use in the lead-free soldering technology. This change has posed a number of challenges in terms of development of lead-free solders and compatible substrates. An increase of at least 20-50 degrees in the reflow temperature is a concern and substantial research is required to investigate a sustainable design of flexible circuit boards as carrier substrates. This paper investigates a number of design variables such as copper conductor width, type of substrate materials, effect of insulating materials, etc. Computer modeling has been used to investigate thermo-mechanical behavior, and reliability, of flexible substrates after they have been subjected to a lead- free solder processing. Results will show particular designs that behave better for a particular rise in peak reflow temperature. Also presented will be the types of failures that can occur in these substrates and what particular materials are more reliable.

Multiphysics simulation of microwave curing in micro-electronics packaging applications

Purpose – This paper aims to present an open-ended microwave curing system for microelectronics components and a numerical analysis framework for virtual testing and prototyping of the system, enabling design of physical prototypes to be optimized, expediting the development process. Design/methodology/approach – An open-ended microwave oven system able to enhance the cure process for thermosetting polymer materials utilised in microelectronics applications is presented. The system is designed to be mounted on a precision placement machine enabling curing of individual components on a circuit board. The design of the system allows the heating pattern and heating rate to be carefully controlled optimising cure rate and cure quality. A multi-physics analysis approach has been adopted to form a numerical model capable of capturing the complex coupling that exists between physical processes. Electromagnetic analysis has been performed using a Yee finite-difference time-domain scheme, while an unstructured finite volume method has been utilized to perform thermophysical analysis. The two solvers are coupled using a sampling-based cross-mapping algorithm. Findings – The numerical results obtained demonstrate that the numerical model is able to obtain solutions for distribution of temperature, rate of cure, degree of cure and thermally induced stresses within an idealised polymer load heated by the proposed microwave system. Research limitations/implications – The work is limited by the absence of experimentally derived material property data and comparative experimental results. However, the model demonstrates that the proposed microwave system would seem to be a feasible method of expediting the cure rate of polymer materials. Originality/value – The findings of this paper will help to provide an understanding of the behaviour of thermosetting polymer materials during microwave cure processing.

Impact of assembly process technologies on electronic packaging materials

Assembly processes used to bond components to printed circuit boards can have a significant impact on these boards and the final packaged component. Traditional approaches to bonding components to printed circuit boards results in heat being applied across the whole board assembly. This can lead to board warpage and possibly high residual stresses. Another approach discussed in this paper is to use Variable Frequency Microwave (VFM) heating to cure adhesives and underfills and bond components to printed circuit boards. In terms of energy considerations the use of VFM technology is much more cost effective compared to convection/radiation heating. This paper will discuss the impact of traditional reflow based processes on flexible substrates and it will demonstrate the possible advantages of using localised variable frequency microwave heating to cure materials in an electronic package.

Influence of megasonic agitation on the electrodeposition of high aspect ratio blind vias

This paper presents preliminary studies in electroplating using megasonic agitation to avoid the formation of voids within high aspect ratio microvias that are used for the redistribution of interconnects in high density interconnection technology in printed circuit boards. Through this technique, uniform deposition of metal on the side walls of the vias is possible. High frequency acoustic streaming at megasonic frequencies enables the decrease of the Nernst diffusion layer down to the sub-micron range, allowing thereby conformal electrodeposition in deep grooves. This effect enables the normally convection free liquid near the surface to be agitated. Higher throughput and better control of the material properties of the deposits can be achieved for the manufacturing of embedded interconnections and metal-based MEMS. For optimal filling performance of the microvias, a full design of experiments (DOE) and a multi-physics numerical simulation have been conducted to analyse the influence of megasonic agitation on the plating quality of the microvias. Megasonic based deposition has been found to increase the deposition rate as well as improving the quality of the metal deposits.