Computer modeling of a micro-manufactured one-turn inductor

The results of a finite element computer modelling analysis of a micro-manufactured one-turn magnetic inductor using the software package ANSYS 10.0 are presented. The inductor is designed for a DC-DC converter used in microelectronic devices. It consists of a copper conductor with a rectangular cross-section plated with an insulation layer and a layer of magnetic core. The analysis has focused on the effects of the frequency and the air gaps on the on the inductance values and the Joule losses in the core and conductor. It has been found that an inductor with small multiple air gaps has lower losses than an inductor with a single larger gap

Design and modeling challenges for high density packaging

Today most of the IC and board designs are undertaken using two-dimensional graphics tools and rule checks. System-in-package is driving three-dimensional design concepts and this is posing a number of challenges for electronic design automation (EDA) software vendors. System-in-package requires three-dimensional EDA tools and design collaboration systems with appropriate manufacturing and assembly rules for these expanding technologies. Simulation and Analysis tools today focus on one aspect of the design requirement, for example, thermal, electrical or mechanical. System-in-Package requires analysis and simulation tools that can easily capture the complex three dimensional structures and provided integrated fast solutions to issues such as thermal management, reliability, electromagnetic interference, etc. This paper discusses some of the challenges faced by the design and analysis community in providing appropriate tools to engineers for System-in-Package design

High electric current density-induced interfacial reactions in micro ball grid array (μBGA) solder joints

The effect of a high electric current density on the interfacial reactions of micro ball grid array solder joints was studied at room temperature and at 150 °C. Four types of phenomena were reported. Along with electromigration-induced interfacial intermetallic compound (IMC) formation, dissolution at the Cu under bump metallization (UBM)/bond pad was also noticed. With a detailed investigation, it was found that the narrow and thin metallization at the component side produced “Joule heating” due to its higher resistance, which in turn was responsible for the rapid dissolution of the Cu UBM/bond pad near to the Cu trace. During an “electromigration test” of a solder joint, the heat generation due to Joule heating and the heat dissipation from the package should be considered carefully. When the heat dissipation fails to compete with the Joule heating, the solder joint melts and molten solder accelerates the interfacial reactions in the solder joint. The presence of a liquid phase was demonstrated from microstructural evidence of solder joints after different current stressing (ranging from 0.3 to 2 A) as well as an in situ observation. Electromigration-induced liquid state diffusion of Cu was found to be responsible for the higher growth rate of the IMC on the anode side.

Ultra-fine pitch stencil printing for a low cost and low temperature flip-chip assembly process

This paper presents the results of a packaging process based on the stencil printing of isotropic conductive adhesives (ICAs) that form the interconnections of flip-chip bonded electronic packages. Ultra-fine pitch (sub-100-mum), low temperature (100degC), and low cost flip-chip assembly is demonstrated. The article details recent advances in electroformed stencil manufacturing that use microengineering techniques to enable stencil fabrication at apertures sizes down to 20mum and pitches as small as 30mum. The current state of the art for stencil printing of ICAs and solder paste is limited between 150-mum and 200-mum pitch. The ICAs-based interconnects considered in this article have been stencil printed successfully down to 50-mum pitch with consistent printing demonstrated at 90-mum pitch size. The structural integrity or the stencil after framing and printing is also investigated through experimentation and computational modeling. The assembly of a flip-chip package based on copper column bumped die and ICA deposits stencil printed at sub-100-mum pitch is described. Computational fluid dynamics modeling of the print performance provides an indicator on the optimum print parameters. Finally, an organic light emitting diode display chip is packaged using this assembly process

Microwave modelling and validation in food thawing applications

Developing temperature fields in frozen cheese sauce undergoing microwave heating were simulated and measured. Two scenarios were investigated: a centric and offset placement on the rotating turntable. Numerical modeling was performed using a dedicated electromagnetic Finite Difference Time Domain (FDTD) module that was two-way coupled to the PHYSICA multiphysics package. Two meshes were used: the food material and container were meshed for the heat transfer and the microwave oven cavity and waveguide were meshed for the microwave field. Power densities obtained on the structured FDTD mesh were mapped onto the unstructured finite volume method mesh for each time-step/turntable position. On heating for each specified time-step the temperature field was mapped back onto the FDTD mesh and the electromagnetic properties were updated accordingly. Changes in thermal/electric properties associated with the phase transition were fully accounted for as well as heat losses from product to cavity. Detailed comparisons were carried out for the centric and offset placements, comparing experimental temperature profiles during microwave thawing with those obtained by numerical simulation.

JOSTLE: multilevel graph partitioning software: an overview

In this chapter we look at JOSTLE, the multilevel graph-partitioning software package, and highlight some of the key research issues that it addresses. We first outline the core algorithms and place it in the context of the multilevel refinement paradigm. We then look at issues relating to its use as a tool for parallel processing and, in particular, partitioning in parallel. Since its first release in 1995, JOSTLE has been used for many mesh-based parallel scientific computing applications and so we also outline some enhancements such as multiphase mesh-partitioning, heterogeneous mapping and partitioning to optimise subdomain shape

Multi-physics modelling for microelectronics and microsystems - current capabilities and future challenges

At present the vast majority of Computer-Aided- Engineering (CAE) analysis calculations for microelectronic and microsystems technologies are undertaken using software tools that focus on single aspects of the physics taking place. For example, the design engineer may use one code to predict the airflow and thermal behavior of an electronic package, then another code to predict the stress in solder joints, and then yet another code to predict electromagnetic radiation throughout the system. The reason for this focus of mesh-based codes on separate parts of the governing physics is essentially due to the numerical technologies used to solve the partial differential equations, combined with the subsequent heritage structure in the software codes. Using different software tools, that each requires model build and meshing, leads to a large investment in time, and hence cost, to undertake each of the simulations. During the last ten years there has been significant developments in the modelling community around multi- physics analysis. These developments are being followed by many of the code vendors who are now providing multi-physics capabilities in their software tools. This paper illustrates current capabilities of multi-physics technology and highlights some of the future challenges

Reliability analysis of SiP structures

This presentation discusses latest developments in SiP technology and the challenges for design in terms of manufacture and reliability. It presents results from a UK government funded project that aims to develop modelling techniques that will assess the thermo-mechanical reliability of SiP structures such as (i) stacked die, (ii) side-by-side dies and (iii) embedded die. Finite element analysis coupled with numerical optimisation and uncertainty analysis is used is used to model the reliability of a particular package design. In particular, the damage (energy density) in the lead free solder interconnects under accelerated temperature cycling is predicted and used to observe the fatigue life-time. Warpage of the structure is also investigated

Thermal analysis of LEDS for liquid crystal display's backlighting

This paper investigated the thermal design of the light emitting diode (LED)onto the board and its packaging. The LED was a 6-lead MultiLED with three chips designed for LCD backlighting and other lighting purposes. A 3D finite element model of this LED was built up and thermal analysis was carried out using the multi physics software package PHYSICA. The modeling results were presented as temperature distributions in each LED, and the predicted junction temperature was used for thermal resistance calculation. The results for the board structure indicated that (1) removing the foil attach decreased the thermal resistance, (2) Increasing the copper foil thickness reduced the thermal resistance. package design indicated that the SMT designed LED with integrated slug gave lower thermal resistance. Pb-free solder material gave lower thermal resistance and junction temperature when compared with conductive adhesive

Numerical simulation of microwave thawing using a coupled solver approach

Thawing of a frozen food product in a domestic microwave oven is numerically simulated using a coupled solver approach. The approach consists of a dedicated electromagnetic FDTD solver and a closely coupled UFVM multi-physics package. Two overlapping numerical meshes are defined; the food material and container were meshed for heat transfer and phase change solution, whilst the microwave oven cavity and waveguide were meshed for the microwave irradiation. The two solution domains were linked using a cross-mapping routine. This approach allowed the rotation of the food load to be captured. Power densities obtained on the structured FDTD mesh were interpolated onto the UFVM mesh for each timestep/turntable position. The UFVM solver utilised the power density data to advance the temperature and phase distribution solution. The temperature-dependant dielectric and thermo-physical properties of the food load were updated prior to revising the electromagnetic solution. Changes in thermal/electric properties associated with the phase transition were fully accounted for as well as heat losses from product to cavity. Two scenarios were investigated: a centric and eccentric placement on the turntable. Developing temperature fields predicted by the numerical solution are validated against experimentally obtained data. Presented results indicate the feasibility of fully coupled simulations of the microwave heating of a frozen product. (© 2008 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Impact of assembly process technologies on electronic packaging materials

Assembly processes used to bond components to printed circuit boards can have a significant impact on these boards and the final packaged component. Traditional approaches to bonding components to printed circuit boards results in heat being applied across the whole board assembly. This can lead to board warpage and possibly high residual stresses. Another approach discussed in this paper is to use Variable Frequency Microwave (VFM) heating to cure adhesives and underfills and bond components to printed circuit boards. In terms of energy considerations the use of VFM technology is much more cost effective compared to convection/radiation heating. This paper will discuss the impact of traditional reflow based processes on flexible substrates and it will demonstrate the possible advantages of using localised variable frequency microwave heating to cure materials in an electronic package.

Numerical analysis of thermal stresses induced during VFM encapsulant curing

Encapsulant curing using a Variable Frequency Microwave (VFM) system is analysed numerically. Thermosetting polymer encapsulant materials require an input of heat energy to initiate the cure process. In this article, the heating is considered to be performed by a novel microwave system, able to perform the curing process more rapidly than conventional techniques. Thermal stresses are induced when packages containing materials with differing coefficients of thermal expansion are heated, and cure stresses are induced as thermosetting polymer materials shrink during the cure process. These stresses are developed during processing and remain as residual stresses within the component after the manufacturing process is complete. As residual stresses will directly affect the reliability of the device, it is necessary to assess their magnitude and the effect on package reliability. A coupled multiphysics model has been developed to numercially analyse the microwave curing process. In order to obtain a usefully accurate model of this process, a holistic approach has been taken, in which the process is not considered to be a sequence of discrete steps, but as a complex coupled system. An overview of the implemented numerical model is presented, with particular focus paid to analysis of induced thermal stresses. Results showing distribution of stresses within an idealised microelectronics package are presented and discussed.

Numerical simulation of encapsulant curing within a variable frequency microwave processing system

Curing of encapsulant material in a simplified microelectronics package using an open oven Variable Frequency Microwave (VFM) system is numerically simulated using a coupled solver approach. A numerical framework capable of simulating electromagnetic field distribution within the oven system, plus heat transfer, cure rate, degree of cure and thermally induced stresses within the encapsulant material is presented. The discrete physical processes have been integrated into a fully coupled solution, enabling usefully accurate results to be generated. Numerical results showing the heating and curing of the encapsulant material have been obtained and are presented in this contribution. The requirement to capture inter-process coupling and the variation in dielectric and thermophysical material properties is discussed and illustrated with simulation results.

Open ended microwave oven for packaging

A novel open waveguide cavity resonator is presented for the combined variable frequency microwave curing of bumps, underfills and encapsulants, as well as the alignment of devices for fast flip-chip assembly, direct chip attach (DCA) or wafer-scale level packaging (WSLP). This technology achieves radio frequency (RF) curing of adhesives used in microelectronics, optoelectronics and medical devices with potential simultaneous micron-scale alignment accuracy and bonding of devices. In principle, the open oven cavity can be fitted directly onto a flip-chip or wafer scale bonder and, as such, will allow for the bonding of devices through localised heating thus reducing the risk to thermally sensitive devices. Variable frequency microwave (VFM) heating and curing of an idealised polymer load is numerically simulated using a multi-physics approach. Electro-magnetic fields within a novel open ended microwave oven developed for use in micro-electronics manufacturing applications are solved using a dedicated Yee scheme finite-difference time-domain (FDTD) solver. Temperature distribution, degree of cure and thermal stresses are analysed using an Unstructured Finite Volume method (UFVM) multi-physics package. The polymer load was meshed for thermophysical analysis, whilst the microwave cavity - encompassing the polymer load - was meshed for microwave irradiation. The two solution domains are linked using a cross mapping routine. The principle of heating using the evanescent fringing fields within the open-end of the cavity is demonstrated. A closed loop feedback routine is established allowing the temperature within a lossy sample to be controlled. A distribution of the temperature within the lossy sample is obtained by using a thermal imaging camera.

On variable frequency microwave processing of heterogeneous chip-on-board assemblies

Variable Frequency Microwave (VFM) processing of heterogeneous chip-on-board assemblies is assessed using a multiphysics modelling approach. The Frequency Agile Microwave Oven Bonding System (FAMOBS) is capable of rapidly processing individual packages on a Chip-On-Board (COB) assembly. This enables each package to be processed in an optimal manner, with temperature ramp rate, maximum temperature and process duration tailored to the specific package, a significant benefit in assemblies containing disparate package types. Such heterogeneous assemblies may contain components such as large power modules alongside smaller modules containing low thermal budget materials with highly disparate processing requirements. The analysis of two disparate packages has been assessed numerically to determine the applicability of the dual section microwave system to curing heterogeneous devices and to determine the influence of differing processing requirements of optimal process parameters.