Ultrahigh Purcell factor in low-threshold nanolaser based on asymmetric hybrid plasmonic cavity

A low-threshold nanolaser with all three dimensions at the subwavelength scale is proposed and investigated. The nanolaser is constructed based on an asymmetric hybrid plasmonic F-P cavity with Ag-coated end facets. Lasing characteristics are calculated using finite element method at the wavelength of 1550 nm. The results show that owing to the low modal loss, large modal confinement factor of the asymmetric plasmonic cavity structure, in conjunction with the high reflectivity of the Ag reflectors, a minimum threshold gain of 240 cm−1 is predicted. Furthermore, the Purcell factor as large as 2518 is obtained with optimized structure parameters to enhance rates of spontaneous and stimulated emission.

Theory and optimisation of 1.3 and 1.55 μm (Al)InGaAs metamorphic quantum well lasers

The use of InGaAs metamorphic buffer layers (MBLs) to facilitate the growth of lattice-mismatched heterostructures constitutes an attractive approach to developing long-wavelength semiconductor lasers on GaAs substrates, since they offer the improved carrier and optical confinement associated with GaAs-based materials. We present a theoretical study of GaAs-based 1.3 and 1.55 μm (Al)InGaAs quantum well (QW) lasers grown on InGaAs MBLs. We demonstrate that optimised 1.3 μm metamorphic devices offer low threshold current densities and high differential gain, which compare favourably with InP-based devices. Overall, our analysis highlights and quantifies the potential of metamorphic QWs for the development of GaAs-based long-wavelength semiconductor lasers, and also provides guidelines for the design of optimised devices.

Low power predictable memory and processing architectures

Great demand in power optimized devices shows promising economic potential and draws lots of attention in industry and research area. Due to the continuously shrinking CMOS process, not only dynamic power but also static power has emerged as a big concern in power reduction. Other than power optimization, average-case power estimation is quite significant for power budget allocation but also challenging in terms of time and effort. In this thesis, we will introduce a methodology to support modular quantitative analysis in order to estimate average power of circuits, on the basis of two concepts named Random Bag Preserving and Linear Compositionality. It can shorten simulation time and sustain high accuracy, resulting in increasing the feasibility of power estimation of big systems. For power saving, firstly, we take advantages of the low power characteristic of adiabatic logic and asynchronous logic to achieve ultra-low dynamic and static power. We will propose two memory cells, which could run in adiabatic and non-adiabatic mode. About 90% dynamic power can be saved in adiabatic mode when compared to other up-to-date designs. About 90% leakage power is saved. Secondly, a novel logic, named Asynchronous Charge Sharing Logic (ACSL), will be introduced. The realization of completion detection is simplified considerably. Not just the power reduction improvement, ACSL brings another promising feature in average power estimation called data-independency where this characteristic would make power estimation effortless and be meaningful for modular quantitative average case analysis. Finally, a new asynchronous Arithmetic Logic Unit (ALU) with a ripple carry adder implemented using the logically reversible/bidirectional characteristic exhibiting ultra-low power dissipation with sub-threshold region operating point will be presented. The proposed adder is able to operate multi-functionally.