12 resultados para Plasma Enhanced Atomic Layer Deposition
em CORA - Cork Open Research Archive - University College Cork - Ireland
Resumo:
Atomic layer deposition (ALD) of highly conformal, silicon-based dielectric thin films has become necessary because of the continuing decrease in feature size in microelectronic devices. The ALD of oxides and nitrides is usually thought to be mechanistically similar, but plasma-enhanced ALD of silicon nitride is found to be problematic, while that of silicon oxide is straightforward. To find why, the ALD of silicon nitride and silicon oxide dielectric films was studied by applying ab initio methods to theoretical models for proposed surface reaction mechanisms. The thermodynamic energies for the elimination of functional groups from different silicon precursors reacting with simple model molecules were calculated using density functional theory (DFT), explaining the lower reactivity of precursors toward the deposition of silicon nitride relative to silicon oxide seen in experiments, but not explaining the trends between precursors. Using more realistic cluster models of amine and hydroxyl covered surfaces, the structures and energies were calculated of reaction pathways for chemisorption of different silicon precursors via functional group elimination, with more success. DFT calculations identified the initial physisorption step as crucial toward deposition and this step was thus used to predict the ALD reactivity of a range of amino-silane precursors, yielding good agreement with experiment. The retention of hydrogen within silicon nitride films but not in silicon oxide observed in FTIR spectra was accounted for by the theoretical calculations and helped verify the application of the model.
Resumo:
Atomic layer deposition (ALD) has been recognized as a promising method to deposit conformal and uniform thin film of copper for future electronic devices. However, many aspects of the reaction mechanism and the surface chemistry of copper ALD remain unclear. In this paper, we employ plane wave density functional theory (DFT) to study the transmetalation ALD reaction of copper dimethylamino-2-propoxide [Cu(dmap)2] and diethylzinc [Et2Zn] that was realized experimentally by Lee et al. [ Angew. Chem., Int. Ed. 2009, 48, 4536−4539]. We find that the Cu(dmap)2 molecule adsorbs and dissociates through the scission of one or two Cu–O bonds into surface-bound dmap and Cu(dmap) fragments during the copper pulse. As Et2Zn adsorbs on the surface covered with Cu(dmap) and dmap fragments, butane formation and desorption was found to be facilitated by the surrounding ligands, which leads to one reaction mechanism, while the migration of ethyl groups to the surface leads to another reaction mechanism. During both reaction mechanisms, ligand diffusion and reordering are generally endothermic processes, which may result in residual ligands blocking the surface sites at the end of the Et2Zn pulse, and in residual Zn being reduced and incorporated as an impurity. We also find that the nearby ligands play a cooperative role in lowering the activation energy for formation and desorption of byproducts, which explains the advantage of using organometallic precursors and reducing agents in Cu ALD. The ALD growth rate estimated for the mechanism is consistent with the experimental value of 0.2 Å/cycle. The proposed reaction mechanisms provide insight into ALD processes for copper and other transition metals.
Resumo:
Silicon carbide (SiC) is a promising material for electronics due to its hardness, and ability to carry high currents and high operating temperature. SiC films are currently deposited using chemical vapor deposition (CVD) at high temperatures 1500–1600 °C. However, there is a need to deposit SiC-based films on the surface of high aspect ratio features at low temperatures. One of the most precise thin film deposition techniques on high-aspect-ratio surfaces that operates at low temperatures is atomic layer deposition (ALD). However, there are currently no known methods for ALD of SiC. Herein, the authors present a first-principles thermodynamic analysis so as to screen different precursor combinations for SiC thin films. The authors do this by calculating the Gibbs energy ΔGΔG of the reaction using density functional theory and including the effects of pressure and temperature. This theoretical model was validated for existing chemical reactions in CVD of SiC at 1000 °C. The precursors disilane (Si2H6), silane (SiH4), or monochlorosilane (SiH3Cl) with ethyne (C2H2), carbontetrachloride (CCl4), or trichloromethane (CHCl3) were predicted to be the most promising for ALD of SiC at 400 °C.
Resumo:
We synthesized nanoscale TiO2-RuO2 alloys by atomic layer deposition (ALD) that possess a high work function and are highly conductive. As such, they function as good Schottky contacts to extract photogenerated holes from n-type silicon while simultaneously interfacing with water oxidation catalysts. The ratio of TiO2 to RuO2 can be precisely controlled by the number of ALD cycles for each precursor. Increasing the composition above 16% Ru sets the electronic conductivity and the metal work function. No significant Ohmic loss for hole transport is measured as film thickness increases from 3 to 45 nm for alloy compositions >= 16% Ru. Silicon photoanodes with a 2 nm SiO2 layer that are coated by these alloy Schottky contacts having compositions in the range of 13-46% Ru exhibit average photovoltages of 525 mV, with a maximum photovoltage of 570 mV achieved. Depositing TiO2-RuO2 alloys on nSi sets a high effective work function for the Schottky junction with the semiconductor substrate, thus generating a large photovoltage that is isolated from the properties of an overlying oxygen evolution catalyst or protection layer.
Resumo:
The deposition by atomic vapor deposition of highly c-axis-oriented Aurivillius phase Bi 5Ti 3FeO 15 (BTFO) thin films on (100) Si substrates is reported. Partially crystallized BTFO films with c-axis perpendicular to the substrate surface were first deposited at 610°C (8 excess Bi), and subsequently annealed at 820°C to get stoichiometric composition. After annealing, the films were highly c-axis-oriented, showing only (00l) peaks in x-ray diffraction (XRD), up to (0024). Transmission electron microscopy (TEM) confirms the BTFO film has a clear layered structure, and the bismuth oxide layer interleaves the four-block pseudoperovskite layer, indicating the n 4 Aurivillius phase structure. Piezoresponse force microscopy measurements indicate strong in-plane piezoelectric response, consistent with the c-axis layered structure, shown by XRD and TEM.
Resumo:
We report the detailed characterization of high quality vanadium oxide (VOx) nanotubes (NTs) and highlight the zipping of adjacent vanadate layers in such NTs formed on remarkable nanourchin structures. These nanostructures consist of high-density spherical radial arrays of NTs. The results evidence vanadate NTs with unprecedented uniformity and evidences the first report of vanadate atomic layer zipping. The NTs are ∼2 μm in length with inner diameters of 20-30 nm. The tube walls comprise scrolled triplet-layers of vanadate intercalated with organic surfactant. Such high-volume structures might be useful as open-access electrolyte scaffolds for lithium insertion-based charge storage devices.
Resumo:
c-axis oriented ferroelectric bismuth titanate (Bi4Ti 3O12) thin films were grown on (001) strontium titanate (SrTiO3) substrates by an atomic vapor deposition technique. The ferroelectric properties of the thin films are greatly affected by the presence of various kinds of defects. Detailed x-ray diffraction data and transmission electron microscopy analysis demonstrated the presence of out-of-phase boundaries (OPBs). It is found that the OPB density changes appreciably with the amount of titanium injected during growth of the thin films. Piezo-responses of the thin films were measured by piezo-force microscopy. It is found that the in-plane piezoresponse is stronger than the out-of-plane response, due to the strong c-axis orientation of the films.
Resumo:
This work looks at the effect on mid-gap interface state defect density estimates for In0.53Ga0.47As semiconductor capacitors when different AC voltage amplitudes are selected for a fixed voltage bias step size (100 mV) during room temperature only electrical characterization. Results are presented for Au/Ni/Al2O3/In0.53Ga0.47As/InP metal–oxide–semiconductor capacitors with (1) n-type and p-type semiconductors, (2) different Al2O3 thicknesses, (3) different In0.53Ga0.47As surface passivation concentrations of ammonium sulphide, and (4) different transfer times to the atomic layer deposition chamber after passivation treatment on the semiconductor surface—thereby demonstrating a cross-section of device characteristics. The authors set out to determine the importance of the AC voltage amplitude selection on the interface state defect density extractions and whether this selection has a combined effect with the oxide capacitance. These capacitors are prototypical of the type of gate oxide material stacks that could form equivalent metal–oxide–semiconductor field-effect transistors beyond the 32 nm technology node. The authors do not attempt to achieve the best scaled equivalent oxide thickness in this work, as our focus is on accurately extracting device properties that will allow the investigation and reduction of interface state defect densities at the high-k/III–V semiconductor interface. The operating voltage for future devices will be reduced, potentially leading to an associated reduction in the AC voltage amplitude, which will force a decrease in the signal-to-noise ratio of electrical responses and could therefore result in less accurate impedance measurements. A concern thus arises regarding the accuracy of the electrical property extractions using such impedance measurements for future devices, particularly in relation to the mid-gap interface state defect density estimated from the conductance method and from the combined high–low frequency capacitance–voltage method. The authors apply a fixed voltage step of 100 mV for all voltage sweep measurements at each AC frequency. Each of these measurements is repeated 15 times for the equidistant AC voltage amplitudes between 10 mV and 150 mV. This provides the desired AC voltage amplitude to step size ratios from 1:10 to 3:2. Our results indicate that, although the selection of the oxide capacitance is important both to the success and accuracy of the extraction method, the mid-gap interface state defect density extractions are not overly sensitive to the AC voltage amplitude employed regardless of what oxide capacitance is used in the extractions, particularly in the range from 50% below the voltage sweep step size to 50% above it. Therefore, the use of larger AC voltage amplitudes in this range to achieve a better signal-to-noise ratio during impedance measurements for future low operating voltage devices will not distort the extracted interface state defect density.
Resumo:
As silicon based devices in integrated circuits reach the fundamental limits of dimensional scaling there is growing research interest in the use of high electron mobility channel materials, such as indium gallium arsenide (InGaAs), in conjunction with high dielectric constant (high-k) gate oxides, for Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) based devices. The motivation for employing high mobility channel materials is to reduce power dissipation in integrated circuits while also providing improved performance. One of the primary challenges to date in the field of III-V semiconductors has been the observation of high levels of defect densities at the high-k/III-V interface, which prevents surface inversion of the semiconductor. The work presented in this PhD thesis details the characterization of MOS devices incorporating high-k dielectrics on III-V semiconductors. The analysis examines the effect of modifying the semiconductor bandgap in MOS structures incorporating InxGa1-xAs (x: 0, 0.15. 0.3, 0.53) layers, the optimization of device passivation procedures designed to reduce interface defect densities, and analysis of such electrically active interface defect states for the high-k/InGaAs system. Devices are characterized primarily through capacitance-voltage (CV) and conductance-voltage (GV) measurements of MOS structures both as a function of frequency and temperature. In particular, the density of electrically active interface states was reduced to the level which allowed the observation of true surface inversion behavior in the In0.53Ga0.47As MOS system. This was achieved by developing an optimized (NH4)2S passivation, minimized air exposure, and atomic layer deposition of an Al2O3 gate oxide. An extraction of activation energies allows discrimination of the mechanisms responsible for the inversion response. Finally a new approach is described to determine the minority carrier generation lifetime and the oxide capacitance in MOS structures. The method is demonstrated for an In0.53Ga0.47As system, but is generally applicable to any MOS structure exhibiting a minority carrier response in inversion.
Resumo:
Silicon photoanodes protected by atomic layer deposited (ALD) TiO2 show promise as components of water splitting devices that may enable the large-scale production of solar fuels and chemicals. Minimizing the resistance of the oxide corrosion protection layer is essential for fabricating efficient devices with good fill factor. Recent literature reports have shown that the interfacial SiO2 layer, interposed between the protective ALD-TiO2 and the Si anode, acts as a tunnel oxide that limits hole conduction from the photoabsorbing substrate to the surface oxygen evolution catalyst. Herein, we report a significant reduction of bilayer resistance, achieved by forming stable, ultrathin (<1.3 nm) SiO2 layers, allowing fabrication of water splitting photoanodes with hole conductances near the maximum achievable with the given catalyst and Si substrate. Three methods for controlling the SiO2 interlayer thickness on the Si(100) surface for ALD-TiO2 protected anodes were employed: (1) TiO2 deposition directly on an HF-etched Si(100) surface, (2) TiO2 deposition after SiO2 atomic layer deposition on an HF-etched Si(100) surface, and (3) oxygen scavenging, post-TiO2 deposition to decompose the SiO2 layer using a Ti overlayer. Each of these methods provides a progressively superior means of reliably thinning the interfacial SiO2 layer, enabling the fabrication of efficient and stable water oxidation silicon anodes.
Resumo:
This thesis investigates the emerging InAlN high electron mobility transistor (HEMT) technology with respect to its application in the space industry. The manufacturing processes and device performance of InAlN HEMTs were compared to AlGaN HEMTs, also produced as part of this work. RF gain up to 4 GHz was demonstrated in both InAlN and AlGaN HEMTs with gate lengths of 1 μm, with InAlN HEMTs generally showing higher channel currents (~150 c.f. 60 mA/mm) but also degraded leakage properties (~ 1 x 10-4 c.f. < 1 x 10-8 A/mm) with respect to AlGaN. An analysis of device reliability was undertaken using thermal stability, radiation hardness and off-state breakdown measurements. Both InAlN and AlGaN HEMTs showed excellent stability under space-like conditions, with electrical operation maintained after exposure to 9.2 Mrad of gamma radiation at a dose rate of 6.6 krad/hour over two months and after storage at 250°C for four weeks. Furthermore a link was established between the optimisation of device performance (RF gain, power handling capabilities and leakage properties) and reliability (radiation hardness, thermal stability and breakdown properties), particularly with respect to surface passivation. Following analysis of performance and reliability data, the InAlN HEMT device fabrication process was optimised by adjusting the metal Ohmic contact formation process (specifically metal stack thicknesses and anneal conditions) and surface passivation techniques (plasma power during dielectric layer deposition), based on an existing AlGaN HEMT process. This resulted in both a reduction of the contact resistivity to around 1 x 10-4 Ω.cm2 and the suppression of degrading trap-related effects, bringing the measured gate-lag close to zero. These discoveries fostered a greater understanding of the physical mechanisms involved in device operation and manufacture, which is elaborated upon in the final chapter.
Resumo:
We report the comparative structural-vibrational study of nanostructures of nanourchins, nanotubes, and nanorods of vanadium oxide. The tube walls comprise layers of vanadium oxide with the organic surfactant intercalated between atomic layers. Both Raman scattering and infrared spectroscopies showed that the structure of nanourchins, nanotubes, and nanorods of vanadium oxide nanocomposite are strongly dependent on the valency of the vanadium, its associated interactions with the organic surfactant template, and on the packing mechanism and arrangement of the surfactant between vanadate layers. Accurate assignment of the vibrational modes to the V-O coordinations has allowed their comparative classification and relation to atomic layer structure. Although all structures are formed from the same precursor, differences in vanadate conformations due to the hydrothermal treatment and surfactant type result in variable degrees of crystalline order in the final nanostructure. The nanotube-containing nanourchins contain vanadate layers in the nanotubes that are in a distorted γ- V5+ conformation, whereas the the nanorods, by comparison, show evidence for V5+ and V4+ species-containing ordered VOx lamina.