Axial symmetry and transverse trace-free tensors in numerical relativity

Transverse trace-free (TT) tensors play an important role in the initial conditions of numerical relativity, containing two of the component freedoms. Expressing a TT tensor entirely, by the choice of two scalar potentials, is not a trivial task however. Assuming the added condition of axial symmetry, expressions are given in both spherical and cylindrical coordinates, for TT tensors in flat space. A coordinate relation is then calculated between the scalar potentials of each coordinate system. This is extended to a non-flat space, though only one potential is found. The remaining equations are reduced to form a second order partial differential equation in two of the tensor components. With the axially symmetric flat space tensors, the choice of potentials giving Bowen-York conformal curvatures, are derived. A restriction is found for the potentials which ensure an axially symmetric TT tensor, which is regular at the origin, and conditions on the potentials, which give an axially symmetric TT tensor with a spherically symmetric scalar product, are also derived. A comparison is made of the extrinsic curvatures of the exact Kerr solution and numerical Bowen-York solution for axially symmetric black hole space-times. The Brill wave, believed to act as the difference between the Kerr and Bowen-York space-times, is also studied, with an approximate numerical solution found for a mass-factor, under different amplitudes of the metric.

Secure architectures for pairing based public key cryptography

Along with the growing demand for cryptosystems in systems ranging from large servers to mobile devices, suitable cryptogrophic protocols for use under certain constraints are becoming more and more important. Constraints such as calculation time, area, efficiency and security, must be considered by the designer. Elliptic curves, since their introduction to public key cryptography in 1985 have challenged established public key and signature generation schemes such as RSA, offering more security per bit. Amongst Elliptic curve based systems, pairing based cryptographies are thoroughly researched and can be used in many public key protocols such as identity based schemes. For hardware implementions of pairing based protocols, all components which calculate operations over Elliptic curves can be considered. Designers of the pairing algorithms must choose calculation blocks and arrange the basic operations carefully so that the implementation can meet the constraints of time and hardware resource area. This thesis deals with different hardware architectures to accelerate the pairing based cryptosystems in the field of characteristic two. Using different top-level architectures the hardware efficiency of operations that run at different times is first considered in this thesis. Security is another important aspect of pairing based cryptography to be considered in practically Side Channel Analysis (SCA) attacks. The naively implemented hardware accelerators for pairing based cryptographies can be vulnerable when taking the physical analysis attacks into consideration. This thesis considered the weaknesses in pairing based public key cryptography and addresses the particular calculations in the systems that are insecure. In this case, countermeasures should be applied to protect the weak link of the implementation to improve and perfect the pairing based algorithms. Some important rules that the designers must obey to improve the security of the cryptosystems are proposed. According to these rules, three countermeasures that protect the pairing based cryptosystems against SCA attacks are applied. The implementations of the countermeasures are presented and their performances are investigated.

Multistabilities and symmetry-broken one-color and two-color states in closely coupled single-mode lasers

We theoretically investigate the dynamics of two mutually coupled, identical single-mode semi-conductor lasers. For small separation and large coupling between the lasers, symmetry-broken one-color states are shown to be stable. In this case the light outputs of the lasers have significantly different intensities while at the same time the lasers are locked to a single common frequency. For intermediate coupling we observe stable symmetry-broken two-color states, where both lasers lase simultaneously at two optical frequencies which are separated by up to 150 GHz. Using a five-dimensional model, we identify the bifurcation structure which is responsible for the appearance of symmetric and symmetry-broken one-color and two-color states. Several of these states give rise to multistabilities and therefore allow for the design of all-optical memory elements on the basis of two coupled single-mode lasers. The switching performance of selected designs of optical memory elements is studied numerically.

Hardware processors for pairing-based cryptography

Bilinear pairings can be used to construct cryptographic systems with very desirable properties. A pairing performs a mapping on members of groups on elliptic and genus 2 hyperelliptic curves to an extension of the finite field on which the curves are defined. The finite fields must, however, be large to ensure adequate security. The complicated group structure of the curves and the expensive field operations result in time consuming computations that are an impediment to the practicality of pairing-based systems. The Tate pairing can be computed efficiently using the ɳT method. Hardware architectures can be used to accelerate the required operations by exploiting the parallelism inherent to the algorithmic and finite field calculations. The Tate pairing can be performed on elliptic curves of characteristic 2 and 3 and on genus 2 hyperelliptic curves of characteristic 2. Curve selection is dependent on several factors including desired computational speed, the area constraints of the target device and the required security level. In this thesis, custom hardware processors for the acceleration of the Tate pairing are presented and implemented on an FPGA. The underlying hardware architectures are designed with care to exploit available parallelism while ensuring resource efficiency. The characteristic 2 elliptic curve processor contains novel units that return a pairing result in a very low number of clock cycles. Despite the more complicated computational algorithm, the speed of the genus 2 processor is comparable. Pairing computation on each of these curves can be appealing in applications with various attributes. A flexible processor that can perform pairing computation on elliptic curves of characteristic 2 and 3 has also been designed. An integrated hardware/software design and verification environment has been developed. This system automates the procedures required for robust processor creation and enables the rapid provision of solutions for a wide range of cryptographic applications.