Accommodating curvature in a highly ordered functionalized metal oxide nanofiber: synthesis, characterization and multi-scale modeling of layered nanosheets

A key element in the rational design of hybrid organic-inorganic nanostructures, is control of surfactant packing and adsorption onto the inorganic phase in crystal growth and assembly. In layered single crystal nanofibers and bilayered 2D nanosheets of vanadium oxide, we show how the chemisorption of preferred densities of surfactant molecules can direct formation of ordered, curved layers. The atom-scale features of the structures are described using molecular dynamics simulations that quantify surfactant packing effects and confirm the preference for a density of 5 dodecanethiol molecules per 8 vanadium attachment sites in the synthesised structures. This assembly maintains a remarkably well ordered interlayer spacing, even when curved. The assemblies of interdigitated organic bilayers on V2O5 are shown to be sufficiently flexible to tolerate curvature while maintaining a constant interlayer distance without rupture, delamination or cleavage. The accommodation of curvature and invariant structural integrity points to a beneficial role for oxide-directed organic film packing effects in layered architectures such as stacked nanofibers and hybrid 2D nanosheet systems.

Block copolymer self-assembly based device structures

This thesis investigated the block copolymer (BCP) thin film characteristics and pattern formation using a set of predetermined molecular weights of PS-b-PMMA and PS-b-PDMS. Post BCP pattern fabrication on the required base substrate a dry plasma etch process was utilised for successful pattern transfer of the BCP resist onto underlying substrate. The resultant sub-10 nm device features were used in front end of line (FEoL) fabrication of active device components in integrated circuits (IC). The potential use of BCP templates were further extended to metal and metal-oxide nanowire fabrication. These nanowires were further investigated in real-time applications as novel sensors and supercapacitors.

Fabrication and characterisation of semiconductor nanowires and metal interconnects

One-dimensional semiconductor nanowires are considered to be promising materials for future nanoelectronic applications. However, before these nanowires can be integrated into such applications, a thorough understanding of their growth behaviour is necessary. In particular, methods that allow the control over nanowire growth are deemed especially important as it is these methods that will enable the control of nanowire dimensions such as length and diameter (high aspect ratios). The production of nanowires with high-aspect ratios is vital in order to take advantage of the unique properties experienced at the nanoscale, thus allowing us to maximise their use in devices. Additionally, the development of low-resistivity interconnects is desirable in order to connect such nanowires in multi-nanowire components. Consequently, this thesis aims to discuss the synthesis and characterisation of germanium (Ge) nanowires and platinum (Pt) interconnects. Particular emphasis is placed on manipulating the nanowire growth kinetics to produce high aspect ratio structures. The discussion of Pt interconnects focuses on the development of low-resistivity devices and the electrical and structural analysis of those devices. Chapter 1 reviews the most critical aspects of Ge nanowire growth which must be understood before they can be integrated into future nanodevices. These features include the synthetic methods employed to grow Ge nanowires, the kinetic and thermodynamic aspects of their growth and nanowire morphology control. Chapter 2 outlines the experimental methods used to synthesise and characterise Ge nanowires as well as the methods used to fabricate and analyse Pt interconnects. Chapter 3 discusses the control of Ge nanowire growth kinetics via the manipulation of the supersaturation of Ge in the Au/Ge binary alloy system. This is accomplished through the use of bi-layer films, which pre-form Au/Ge alloy catalysts before the introduction of the Ge precursor. The growth from these catalysts is then compared with Ge nanowire growth from standard elemental Au seeds. Nanowires grown from pre-formed Au/Ge alloy seeds demonstrate longer lengths and higher growth rates than those grown from standard Au seeds. In-situ TEM heating on the Au/Ge bi-layer films is used to support the growth characteristics observed. Chapter 4 extends the work of chapter 3 by utilising Au/Ag/Ge tri-layer films to enhance the growth rates and lengths of Ge nanowires. These nanowires are grown from Au/Ag/Ge ternary alloy catalysts. Once again, the supersaturation is influenced, only this time it is through the simultaneous manipulation of both the solute concentration and equilibrium concentration of Ge in the Au/Ag/Ge ternary alloy system. The introduction of Ag to the Au/Ge binary alloy lowers the equilibrium concentration, thus increasing the nanowire growth rate and length. Nanowires with uniform diameters were obtained via synthesis from AuxAg1-x alloy nanoparticles. Manifestation of the Gibbs-Thomson effect, resulting from the dependence of the mean nanowire length as a function of diameter, was observed for all of the nanowires grown from the AuxAg1-x nanoparticles. Finally, in-situ TEM heating was used to support the nanowire growth characteristics. Chapter 5 details the fabrication and characterisation of Pt interconnects deposited by electron beam induced deposition of two different precursors. The fabrication is conducted inside a dual beam FIB. The electrical and structural characteristics of interconnects deposited from a standard organometallic precursor and a novel carbon-free precursor are compared. The electrical performance of the carbon-free interconnects is shown to be superior to that of the organometallic devices and this is correlated to the structural composition of both interconnects via in-situ TEM heating and HAADF-STEM analysis. Annealing of the interconnects is carried out under two different atmospheres in order to reduce the electrical resistivity even further. Finally, chapter 6 presents some important conclusions and summarises each of the previous chapters.

Reductive elimination of hypersilyl halides from zinc (II) complexes. Implications for electropositive metal thin film growth

Treatment of Zn(Si(SiMe3)3)2 with ZnX2 (X = Cl, Br, I) in tetrahydrofuran (THF) at 23 °C afforded [Zn(Si(SiMe3)3)X(THF)]2 in 83–99% yield. X-ray crystal structures revealed dimeric structures with Zn2X2 cores. Thermogravimetric analyses of [Zn(Si(SiMe3)3)X(THF)]2 demonstrated a loss of coordinated THF between 50 and 155 °C and then single-step weight losses between 200 and 275 °C. The nonvolatile residue was zinc metal in all cases. Bulk thermolyses of [Zn(Si(SiMe3)3)X(THF)]2 between 210 and 250 °C afforded zinc metal in 97–99% yield, Si(SiMe3)3X in 91–94% yield, and THF in 81–98% yield. Density functional theory calculations confirmed that zinc formation becomes energetically favorable upon THF loss. Similar reactions are likely to be general for M(SiR3)n/MXn pairs and may lead to new metal-film-growth processes for chemical vapor deposition and atomic layer deposition.

Formation of sub-7 nm feature size PS-b-P4VP block copolymer structures by solvent vapour process

The nanometer range structure produced by thin films of diblock copolymers makes them a great of interest as templates for the microelectronics industry. We investigated the effect of annealing solvents and/or mixture of the solvents in case of symmetric Poly (styrene-block-4vinylpyridine) (PS-b-P4VP) diblock copolymer to get the desired line patterns. In this paper, we used different molecular weights PS-b-P4VP to demonstrate the scalability of such high χ BCP system which requires precise fine-tuning of interfacial energies achieved by surface treatment and that improves the wetting property, ordering, and minimizes defect densities. Bare Silicon Substrates were also modified with polystyrene brush and ethylene glycol self-assembled monolayer in a simple quick reproducible way. Also, a novel and simple in situ hard mask technique was used to generate sub-7nm Iron oxide nanowires with a high aspect ratio on Silicon substrate, which can be used to develop silicon nanowires post pattern transfer.