Design and implementation of the embedded capacitance layers for decoupling of wireless sensor nodes

In this paper, the embedded capacitance material (ECM) is fabricated between the power and ground layers of the wireless sensor nodes, forming an integrated capacitance to replace the large amount of decoupling capacitors on the board. The ECM material, whose dielectric constant is 16, has the same size of the wireless sensor nodes of 3cm*3cm, with a thickness of only 14μm. Though the capacitance of a single ECM layer being only around 8nF, there are two reasons the ECM layers can still replace the high frequency decoupling capacitors (100nF in our case) on the board. The first reason is: the parasitic inductance of the ECM layer is much lower than the surface mount capacitors'. A smaller capacitance value of the ECM layer could achieve the same resonant frequency of the surface mount decoupling capacitors. Simulation and measurement fit this assumption well. The second reason is: more than one layer of ECM material are utilized during the design step to get a parallel connection of the several ECM capacitance layers, finally leading to a larger value of the capacitance and smaller value of parasitic. Characterization of the ECM is carried out by the LCR meter. To evaluate the behaviors of the ECM layer, time and frequency domain measurements are performed on the power-bus decoupling of the wireless sensor nodes. Comparison with the measurements of bare PCB board and decoupling capacitors solution are provided to show the improvement of the ECM layer. Measurements show that the implementation of the ECM layer can not only save the space of the surface mount decoupling capacitors, but also provide better power-bus decoupling to the nodes.

Atomic layer deposition of interface control layers for the fabrication of III/V MOS devices

The continued advancement of metal oxide semiconductor field effect transistor (MOSFET) technology has shifted the focus from Si/SiO2 transistors towards high-κ/III-V transistors for high performance, faster devices. This has been necessary due to the limitations associated with the scaling of the SiO2 thickness below ~1 nm and the associated increased leakage current due to direct electron tunnelling through the gate oxide. The use of these materials exhibiting lower effective charge carrier mass in conjunction with the use of a high-κ gate oxide allows for the continuation of device scaling and increases in the associated MOSFET device performance. The high-κ/III-V interface is a critical challenge to the integration of high-κ dielectrics on III-V channels. The interfacial chemistry of the high-κ/III-V system is more complex than Si, due to the nature of the multitude of potential native oxide chemistries at the surface with the resultant interfacial layer showing poor electrical insulating properties when high-κ dielectrics are deposited directly on these oxides. It is necessary to ensure that a good quality interface is formed in order to reduce leakage and interface state defect density to maximise channel mobility and reduce variability and power dissipation. In this work, the ALD growth of aluminium oxide (Al2O3) and hafnium oxide (HfO2) after various surface pre-treatments was carried out, with the aim of improving the high-κ/III-V interface by reducing the Dit – the density of interface defects caused by imperfections such as dangling bonds, dimers and other unsatisfied bonds at the interfaces of materials. A brief investigation was performed into the structural and electrical properties of Al2O3 films deposited on In0.53Ga0.47As at 200 and 300oC via a novel amidinate precursor. Samples were determined to experience a severe nucleation delay when deposited directly on native oxides, leading to diminished functionality as a gate insulator due to largely reduced growth per cycle. Aluminium oxide MOS capacitors were prepared by ALD and the electrical characteristics of GaAs, In0.53Ga0.47As and InP capacitors which had been exposed to pre-pulse treatments from triethyl gallium and trimethyl indium were examined, to determine if self-cleaning reactions similar to those of trimethyl aluminium occur for other alkyl precursors. An improved C-V characteristic was observed for GaAs devices indicating an improved interface possibly indicating an improvement of the surface upon pre-pulsing with TEG, conversely degraded electrical characteristics observed for In0.53Ga0.47As and InP MOS devices after pre-treatment with triethyl gallium and trimethyl indium respectively. The electrical characteristics of Al2O3/In0.53Ga0.47As MOS capacitors after in-situ H2/Ar plasma treatment or in-situ ammonium sulphide passivation were investigated and estimates of interface Dit calculated. The use of plasma reduced the amount of interface defects as evidenced in the improved C-V characteristics. Samples treated with ammonium sulphide in the ALD chamber were found to display no significant improvement of the high-κ/III-V interface. HfO2 MOS capacitors were fabricated using two different precursors comparing the industry standard hafnium chloride process with deposition from amide precursors incorporating a ~1nm interface control layer of aluminium oxide and the structural and electrical properties investigated. Capacitors furnished from the chloride process exhibited lower hysteresis and improved C-V characteristics as compared to that of hafnium dioxide grown from an amide precursor, an indication that no etching of the film takes place using the chloride precursor in conjunction with a 1nm interlayer. Optimisation of the amide process was carried out and scaled samples electrically characterised in order to determine if reduced bilayer structures display improved electrical characteristics. Samples were determined to exhibit good electrical characteristics with a low midgap Dit indicative of an unpinned Fermi level

Bottom-up growth of fully transparent contact layers of indium tin oxide nanowires for light-emitting devices

Thin layers of indium tin oxide are widely used as transparent coatings and electrodes in solar energy cells, flat-panel displays, antireflection coatings, radiation protection and lithium-ion battery materials, because they have the characteristics of low resistivity, strong absorption at ultraviolet wavelengths, high transmission in the visible, high reflectivity in the far-infrared and strong attenuation in the microwave region. However, there is often a trade-off between electrical conductivity and transparency at visible wavelengths for indium tin oxide and other transparent conducting oxides. Here, we report the growth of layers of indium tin oxide nanowires that show optimum electronic and photonic properties and demonstrate their use as fully transparent top contacts in the visible to near-infrared region for light-emitting devices.

Low-dimensional, hinged bar-code metal oxide layers and free-standing, ordered organic nanostructures from turbostratic vanadium oxide

Both low-dimensional bar-coded metal oxide layers, which exhibit molecular hinging, and free-standing organic nanostructures can be obtained from unique nanofibers of vanadium oxide (VOx). The nanofibers are successfully synthesized by a simple chemical route using an ethanolic solution of vanadium pentoxide xerogel and dodecanethiol resulting in a double bilayered laminar turbostratic structure. The formation of vanadium oxide nanofibers is observed after hydrothermal treatment of the thiol-intercalated xerogel, resulting in typical lengths in the range 2–6 µm and widths of about 50–500 nm. We observe concomitant hinging of the flexible nanofiber lamina at periodic hinge points in the final product on both the nanoscale and molecular level. Bar-coded nanofibers comprise alternating segments of organic–inorganic (thiols–VOx) material and are amenable to segmented, localized metal nanoparticle docking. Under certain conditions free-standing bilayered organic nanostructures are realized.

Formation and characterization of porous InP layers in KOH Solutions

Porous InP layers were formed electrochemically on (100) oriented n-InP substrates in various concentrations of aqueous KOH under dark conditions. In KOH concentrations from 2 mol dm-3 to 5 mol dm-3, a porous layer is obtained underneath a dense near-surface layer. The pores within the porous layer appear to propagate from holes through the near-surface layer. Transmission electron microscopy studies of the porous layers formed under both potentiodynamic and potentiostatic conditions show that both the thickness of the porous layer and the mean pore diameter decrease with increasing KOH concentration. The degree of porosity, estimated to be 65%, was found to remain relatively constant for all the porous layers studied.

Optical emission of strained direct-band-gap Ge quantum well embedded inside InGaAs alloy layers

We studied the optical properties of a strain-induced direct-band-gap Ge quantum well embedded in InGaAs. We showed that the band offsets depend on the electronegativity of the layer in contact with Ge, leading to different types of optical transitions in the heterostructure. When group-V atoms compose the interfaces, only electrons are confined in Ge, whereas both carriers are confined when the interface consists of group-III atoms. The different carrier confinement results in different emission dynamics behavior. This study provides a solution to obtain efficient light emission from Ge.