Giant piezoresistance in silicon-germanium alloys

We use first-principles electronic structure methods to show that the piezoresistive strain gauge factor of single-crystalline bulk n-type silicon-germanium alloys at carefully controlled composition can reach values of G = 500, three times larger than that of silicon, the most sensitive such material used in industry today. At cryogenic temperatures of 4 K we find gauge factors of G = 135 000, 13 times larger than that observed in Si whiskers. The improved piezoresistance is achieved by tuning the scattering of carriers between different (Delta and L) conduction band valleys by controlling the alloy composition and strain configuration.

Low power predictable memory and processing architectures

Great demand in power optimized devices shows promising economic potential and draws lots of attention in industry and research area. Due to the continuously shrinking CMOS process, not only dynamic power but also static power has emerged as a big concern in power reduction. Other than power optimization, average-case power estimation is quite significant for power budget allocation but also challenging in terms of time and effort. In this thesis, we will introduce a methodology to support modular quantitative analysis in order to estimate average power of circuits, on the basis of two concepts named Random Bag Preserving and Linear Compositionality. It can shorten simulation time and sustain high accuracy, resulting in increasing the feasibility of power estimation of big systems. For power saving, firstly, we take advantages of the low power characteristic of adiabatic logic and asynchronous logic to achieve ultra-low dynamic and static power. We will propose two memory cells, which could run in adiabatic and non-adiabatic mode. About 90% dynamic power can be saved in adiabatic mode when compared to other up-to-date designs. About 90% leakage power is saved. Secondly, a novel logic, named Asynchronous Charge Sharing Logic (ACSL), will be introduced. The realization of completion detection is simplified considerably. Not just the power reduction improvement, ACSL brings another promising feature in average power estimation called data-independency where this characteristic would make power estimation effortless and be meaningful for modular quantitative average case analysis. Finally, a new asynchronous Arithmetic Logic Unit (ALU) with a ripple carry adder implemented using the logically reversible/bidirectional characteristic exhibiting ultra-low power dissipation with sub-threshold region operating point will be presented. The proposed adder is able to operate multi-functionally.

Development of block copolymer lithography for device structure fabrication

This thesis investigated well-ordered block copolymer (BCP) thin film characteristics and their use for nanoscale pattern formation using a series of polystyrene-block-polymethylmethacrylate (PS-b-PMMA), polystyrene-blockpolydimethylsiloxane (PS-b-PDMS) and polystyrene-block-poly(ethylene oxide) (PS-b-PEO) systems of various molecular weights. BCP thin films, which act as an ‘on-chip’ etch mask and material templates, are highly promising self-assembling process for future scalable nanolithography. Unlike conventional BCP processing methods, the work in this thesis demonstrates that well-ordered patterns can be achieved in a few seconds compared to several hours by use of a non-conventional microwave assisted technique. As a result, well-ordered BCP nanoscale structures can be developed in industry appropriate periods facilitating their incorporation into current technologies. An optimised and controlled plasma dry etch process was used for successful pattern transfer to the underlying silicon substrate. Long range ordered BCP templates were further modified by selective metal inclusion technique to form a hard mask template towards fabrication of high aspect ratio nanopillars and nanowires. The work described here is centred on how these templates might be used to generate function at substrate surfaces. Herein we describe a number of innovations which might allow their successful uptake in a number of applications.