High temperature limit in static backgrounds

We prove that the hard thermal loop contribution to static thermal amplitudes can be obtained by setting all the external four-momenta to zero before performing the Matsubara sums and loop integrals. At the one-loop order we do an iterative procedure for all the one-particle irreducible one-loop diagrams, and at the two-loop order we consider the self-energy. Our approach is sufficiently general to the extent that it includes theories with any kind of interaction vertices, such as gravity in the weak field approximation, for d space-time dimensions. This result is valid whenever the external fields are all bosonic.

Flux-Line-Lattice Melting and Upper Critical Field of Bi1.65Pb0.35Sr2Ca2Cu3O10+delta Ceramic Samples

We have conducted magnetoresistance measurements rho(T,H) in applied magnetic fields up to 18 T in Bi1.65Pb0.35Sr2Ca2Cu3O10+delta ceramic samples which were subjected to different uniaxial compacting pressures. The anisotropic upper critical fields H (c2)(T) were extracted from the rho(T,H) data, yielding and the out-of-plane superconducting coherence length xi (c) (0)similar to 3 . We have also estimated and xi (ab) (0) similar to 90 . In addition to this, a flux-line-lattice (FLL) melting temperature T (m) has been identified as a second peak in the derivative of the magnetoresistance d rho/dT data close to the superconducting transition temperature. An H (m) vs. T phase diagram was constructed and the FLL boundary lines were found to obey a temperature dependence H (m) ae(T (c) /T-1) (alpha) , where alpha similar to 2 for the sample subjected to the higher compacting pressure. A reasonable value of the Lindemann parameter c (L) similar to 0.29 has been found for all samples studied.

Temperature impact on the tunnel fet off-state current components

In this work, the temperature impact on the off-state current components is analyzed through numerical simulation and experimentally. First of all, the band-to-band tunneling is studied by varying the underlap in the channel/drain junction, leading to an analysis of the different off-state current components. For pTFET devices, the best behavior for off-state current was obtained for higher values of underlap (reduced BTBT) and at low temperatures (reduced SRH and TAT). At high temperature, an unexpected off-state current occurred due to the thermal leakage current through the drain/channel junction. Besides, these devices presented a good performance when considering the drain current as a function of the drain voltage, making them suitable for analog applications. (C) 2012 Elsevier Ltd. All rights reserved.