Controladores repetitivos aplicados a filtros ativos de potência sob variações de carga e de frequência da rede

This work presents the development and modification of techniques to reduce the effects of load variation and mains frequency deviation in repetitive controllers applied to active power filters. To minimize the effects of aperiodic signals resulting from the connection or disconnection of non-linear loads is developed a technique which recognizes linear and nonlinear loads, and operates to reset the controller only when the error due to the transition of considerable value, and the transition is from non-linear to linear load. An algorithm to adapt the gain of the repetitive controller, based on a sigmoid function adaptation, in order to minimize the effects caused by random noise in the measurement system is also used. This work also analyzes the effects of frequency variation and presents the main methods to cope with this situation. Some solutions are the change in the number of samples per period and the variation of the sampling rate. The first has the advantage of using linear design techniques and results in a time invariant system. The second method changes the sampling frequency and leads to a time variant system that demands a difficult analysis of stability. The proposed algorithms were tested using the methods of truncation of the number of samples and the method of changing the sampling rate of the system to compensate possible frequency variations of the grid. Experimental results are presented to validate the proposal.

Arquitetura híbrida com DSP e FPGA para implementação de controladores de filtros ativos de potência

The presence of non-linear loads at a point in the distribution system may deform voltage waveform due to the consumption of non-sinusoidal currents. The use of active power filters allows significant reduction of the harmonic content in the supply current. However, the processing of digital control structures for these filters may require high performance hardware, particularly for reference currents calculation. This work describes the development of hardware structures with high processing capability for application in active power filters. In this sense, it considers an architecture that allows parallel processing using programmable logic devices. The developed structure uses a hybrid model using a DSP and an FPGA. The DSP is used for the acquisition of current and voltage signals, calculation of fundamental current related controllers and PWM generation. The FPGA is used for intensive signal processing, such as the harmonic compensators. In this way, from the experimental analysis, significant reductions of the processing time are achieved when compared to traditional approaches using only DSP. The experimental results validate the designed structure and these results are compared with other ones from architectures reported in the literature.