Towards model round-trip engineering : an abductive approach

Providing support for reversible transformations as a basis for round-trip engineering is a significant challenge in model transformation research. While there are a number of current approaches, they require the underlying transformation to exhibit an injective behaviour when reversing changes. This however, does not serve all practical transformations well. In this paper, we present a novel approach to round-trip engineering that does not place restrictions on the nature of the underlying transformation. Based on abductive logic programming, it allows us to compute a set of legitimate source changes that equate to a given change to the target model. Encouraging results are derived from an initial prototype that supports most concepts of the Tefkat transformation language

Web searching and Σ2 queries

In the terminology of Logic programming, current search engines answer Sigma1 queries (formulas of the form where is a boolean combination of attributes). Such a query is determined by a particular sequence of keywords input by a user. In order to give more control to users, search engines will have to tackle more expressive queries, namely, Sigma2 queries (formulas of the form ). The purpose of the talk is to examine which directions could be explored in order to move towards more expressive languages, more powerful search engines, and the benefits that users should expect.

Automated Feedback for 'Fill in the Gap' Programming Exercises

Timely feedback is a vital component in the learning process. It is especially important for beginner students in Information Technology since many have not yet formed an effective internal model of a computer that they can use to construct viable knowledge. Research has shown that learning efficiency is increased if immediate feedback is provided for students. Automatic analysis of student programs has the potential to provide immediate feedback for students and to assist teaching staff in the marking process. This paper describes a “fill in the gap” programming analysis framework which tests students’ solutions and gives feedback on their correctness, detects logic errors and provides hints on how to fix these errors. Currently, the framework is being used with the Environment for Learning to Programming (ELP) system at Queensland University of Technology (QUT); however, the framework can be integrated into any existing online learning environment or programming Integrated Development Environment (IDE)

Mind change complexity of learning logic programs

The present paper motivates the study of mind change complexity for learning minimal models of length-bounded logic programs. It establishes ordinal mind change complexity bounds for learnability of these classes both from positive facts and from positive and negative facts. Building on Angluin’s notion of finite thickness and Wright’s work on finite elasticity, Shinohara defined the property of bounded finite thickness to give a sufficient condition for learnability of indexed families of computable languages from positive data. This paper shows that an effective version of Shinohara’s notion of bounded finite thickness gives sufficient conditions for learnability with ordinal mind change bound, both in the context of learnability from positive data and for learnability from complete (both positive and negative) data. Let Omega be a notation for the first limit ordinal. Then, it is shown that if a language defining framework yields a uniformly decidable family of languages and has effective bounded finite thickness, then for each natural number m >0, the class of languages defined by formal systems of length <= m: • is identifiable in the limit from positive data with a mind change bound of Omega (power)m; • is identifiable in the limit from both positive and negative data with an ordinal mind change bound of Omega × m. The above sufficient conditions are employed to give an ordinal mind change bound for learnability of minimal models of various classes of length-bounded Prolog programs, including Shapiro’s linear programs, Arimura and Shinohara’s depth-bounded linearly covering programs, and Krishna Rao’s depth-bounded linearly moded programs. It is also noted that the bound for learning from positive data is tight for the example classes considered.

Coordinated road-junction traffic control by dynamic programming

This paper presents a novel approach to road-traffic control for interconnected junctions. With a local fuzzy-logic controller (FLC) installed at each junction, a dynamic-programming (DP) technique is proposed to derive the green time for each phase in a traffic-light cycle. Coordination parameters from the adjacent junctions are also taken into consideration so that organized control is extended beyond a single junction. Instead of pursuing the absolute optimization of traffic delay, this study examines a practical approach to enable the simple implementation of coordination among junctions, while attempting to reduce delays, if possible. The simulation results show that the delay per vehicle can be substantially reduced, particularly when the traffic demand reaches the junction capacity. The implementation of this controller does not require complicated or demanding hardware, and such simplicity makes it a useful tool for offline studies or realtime control purposes.

The Spartan-3E Tutorial 1 : Introduction to FPGA Programming, Version 1.0

This tutorial is designed to help new users become familiar with using the Spartan-3E board. The tutorial steps through the following: writing a small program in VHDL which carries out simple combinational logic; connecting the program inputs and outputs to the switches, buttons and LEDs on the Spartan-3E board; and downloading the program to the Spartan-3E board using the Project Navigator software.

Five-level current-source inverters with buck-boost and inductive-current balancing capabilities

This paper presents new five-level current-source inverters (CSIs) with voltage/current buck-boost capability, unlike existing five-level CSIs where only voltage-boost operation is supported. The proposed inverters attain self-inductive-current-balancing per switching cycle at their dc front ends without having to include additional balancing hardware or complex control manipulation. The inverters can conveniently be controlled by using the well-established phase-shifted carrier modulation scheme with only two additional linear references and a mapping logic table needed. Existing modulators can therefore be conveniently retrofitted for controlling the presented inverters. By appropriately coordinating the inverter gating signals, their implementations can be realized by using the least number of components without degrading performance. These enhanced features of the inverters have already been verified in simulation and experimentally using a scaled-down laboratory platform.

The Spartan-3E Tutorial 1 : Introduction to FPGA Programming, Version 2.0

This tutorial is designed to help new users become familiar with using the Spartan-3E board. The tutorial steps through: writing a small program in VHDL which carries out simple combinational logic; connecting the program inputs and outputs to the switches, buttons and LEDs on the Spartan-3E board; downloading the program to the Spartan-3E board using version 14.7 of the Xilinx ISE; and simulating the program using the iSim Simulator.