62 resultados para printed circuit board

em Indian Institute of Science - Bangalore - Índia


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The Printed Circuit Board (PCB) layout design is one of the most important and time consuming phases during equipment design process in all electronic industries. This paper is concerned with the development and implementation of a computer aided PCB design package. A set of programs which operate on a description of the circuit supplied by the user in the form of a data file and subsequently design the layout of a double-sided PCB has been developed. The algorithms used for the design of the PCB optimise the board area and the length of copper tracks used for the interconnections. The output of the package is the layout drawing of the PCB, drawn on a CALCOMP hard copy plotter and a Tektronix 4012 storage graphics display terminal. The routing density (the board area required for one component) achieved by this package is typically 0.8 sq. inch per IC. The package is implemented on a DEC 1090 system in Pascal and FORTRAN and SIGN(1) graphics package is used for display generation.

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One of the foremost design considerations in microelectronics miniaturization is the use of embedded passives which provide practical solution. In a typical circuit, over 80 percent of the electronic components are passives such as resistors, inductors, and capacitors that could take up to almost 50 percent of the entire printed circuit board area. By integrating passive components within the substrate instead of being on the surface, embedded passives reduce the system real estate, eliminate the need for discrete and assembly, enhance electrical performance and reliability, and potentially reduce the overall cost. Moreover, it is lead free. Even with these advantages, embedded passive technology is at a relatively immature stage and more characterization and optimization are needed for practical applications leading to its commercialization.This paper presents an entire process from design and fabrication to electrical characterization and reliability test of embedded passives on multilayered microvia organic substrate. Two test vehicles focusing on resistors and capacitors have been designed and fabricated. Embedded capacitors in this study are made with polymer/ceramic nanocomposite (BaTiO3) material to take advantage of low processing temperature of polymers and relatively high dielectric constant of ceramics and the values of these capacitors range from 50 pF to 1.5 nF with capacitance per area of approximately 1.5 nF/cm(2). Limited high frequency measurement of these capacitors was performed. Furthermore, reliability assessments of thermal shock and temperature humidity tests based on JEDEC standards were carried out. Resistors used in this work have been of three types: 1) carbon ink based polymer thick film (PTF), 2) resistor foils with known sheet resistivities which are laminated to printed wiring board (PWB) during a sequential build-up (SBU) process and 3) thin-film resistor plating by electroless method. Realization of embedded resistors on conventional board-level high-loss epoxy (similar to 0.015 at 1 GHz) and proposed low-loss BCB dielectric (similar to 0.0008 at > 40 GHz) has been explored in this study. Ni-P and Ni-W-P alloys were plated using conventional electroless plating, and NiCr and NiCrAlSi foils were used for the foil transfer process. For the first time, Benzocyclobutene (BCB) has been proposed as a board level dielectric for advanced System-on-Package (SOP) module primarily due to its attractive low-loss (for RF application) and thin film (for high density wiring) properties.Although embedded passives are more reliable by eliminating solder joint interconnects, they also introduce other concerns such as cracks, delamination and component instability. More layers may be needed to accommodate the embedded passives, and various materials within the substrate may cause significant thermo -mechanical stress due to coefficient of thermal expansion (CTE) mismatch. In this work, numerical models of embedded capacitors have been developed to qualitatively examine the effects of process conditions and electrical performance due to thermo-mechanical deformations.Also, a prototype working product with the board level design including features of embedded resistors and capacitors are underway. Preliminary results of these are presented.

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This paper presents a simple and low cost fabrication approach using extended printed circuit board processing techniques for an electrostatically actuated phase shifter on a common microwave laminate. This approach uses 15 mu m thin copper foils for realizing the bridge structures as well as for a spacer. A polymeric thin film deposited by spin coating and patterned using lithographic process is used as a dielectric layer to improve the reliability of the device. The prototype of the phase shifter for X-band operation is fabricated and tested for electrical and electromechanical performance parameters. The realized devices have a figure of merit of 70 degrees/dB for a maximum applied bias potential of 85 V. Since these phase shifters can be conveniently fabricated directly on microwave substrates used for feed distribution networks of phased arrays, the overall addition in cost, dimensions and processing for including these phase shifters in these arrays is minimal.

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This letter relates to the design of crossovers for carrying criss crossing signals. Two types of crossovers are proposed in this letter. Both the crossovers are designed using a two layer printed circuit board. An unbroken continuous transmission line is routed in the top layer for carrying signal 1 from one node to another node. Transmission line used for carrying a signal 2 consists of three physically discontinuous, but electrically connected segments. Two end segments of these are located in the top layer while the middle segment is placed in the bottom layer. While Type I crossover offers an isolation of 25 dB, Type II crossover offers isolation better than 35 dB from dc to 10 GHz. These crossovers are compact and measure an actual size of 10 x 10 x 0.78 mm(3).

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As System-on-Chip (SoC) designs migrate to 28nm process node and beyond, the electromagnetic (EM) co-interactions of the Chip-Package-Printed Circuit Board (PCB) becomes critical and require accurate and efficient characterization and verification. In this paper a fast, scalable, and parallelized boundary element based integral EM solutions to Maxwell equations is presented. The accuracy of the full-wave formulation, for complete EM characterization, has been validated on both canonical structures and real-world 3-D system (viz. Chip + Package + PCB). Good correlation between numerical simulation and measurement has been achieved. A few examples of the applicability of the formulation to high speed digital and analog serial interfaces on a 45nm SoC are also presented.

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Presented in this paper is an improvement over a spring-steel dual-axis accelerometer that we had reported earlier.The fabrication process (which entails wire-cut electro discharge machining of easily accessible and inexpensive spring-steelfoil) and the sensing of the displacement (which is done using off-the-shelf Hall-effect sensors) remain the same. Theimprovements reported here are twofold: (i) the footprint of the packaged accelerometer is reduced from 80 mm square to 40mm square, and (ii) almost perfect de-coupling and symmetry are achieved between the two in-plane axes of the packageddevice as opposed to the previous embodiment where this was not the case. Good linearity with about 40 mV/g was measuredalong both the in-plane axes over a range of 0.1 to 1 g. The first two natural frequencies of the devices are at 30 Hz and 100Hz, respectively, as per the experiment. The highlights of this work are cost-effective processing, easy integration of the Hall-effect sensing capability on a customised printed circuit board, and inexpensive packaging without overly compromising eitherthe overall size or the sensitivity of the accelerometer. Through this work, we have reaffirmed the practicability of spring-steelaccelerometers towards the eventual goal of making it compete with micro machined silicon accelerometers in terms of sizeand performance. The cost is likely to be much lower for the spring-steel accelerometers than that of silicon accelerometers, especially when the volume of production is low and the sensor is to be used as a single packaged unit.

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With the premise that electronic noise dominates mechanical noise in micromachined accelerometers, we present here a method to enhance the sensitivity and resolution at kHz bandwidth using mechanical amplification. This is achieved by means of a Displacement-amplifying Compliant Mechanism (DaCM) that is appended to the usual sensing element comprising a proof-mass and a suspension. Differential comb-drive arrangement is used for capacitive-sensing. The DaCM is designed to match the stiffness of the suspension so that there is substantial net amplification without compromising the bandwidth. A spring-mass-lever model is used to estimate the lumped parameters of the system. A DaCM-aided accelerometer and another without a DaCM-both occupying the same footprint-are compared to show that the former gives enhanced sensitivity: 8.7 nm/g vs. 1.4 nm/g displacement at the sensing-combs under static conditions. A prototype of the DaCM-aided micromachined acclerometer was fabricated using bulk-micromachining. It was tested at the die-level and then packaged on a printed circuit board with an off-the-shelf integrated chip for measuring change in capacitance. Under dynamic conditions, the measured amplification factor at the output of the DaCM was observed to be about 11 times larger than the displacement of the proof-mass and thus validating the concept of enhancing the sensitivity of accelerometers using mechanical amplifiers. The measured first in-plane natural frequency of the fabricated accelerometer was 6.25 kHz. The packaged accelerometer with the DaCM was measured to have 26.7 mV/g sensitivity at 40 Hz.

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We present the circuit board integration of a self-healing mechanism to repair open faults. The electric field driven mechanism physically restores fractured interconnects in electronic circuits and has the ability to solve mazes. The repair is performed by conductive particles dispersed in an insulating fluid. We demonstrate the integration of the healing module onto printed circuit boards and the ability of maze solving. We model and perform experiments on the influence of the geometry of conductive particles as well as the terminal impedances of the route on the healing efficiency. The typical heal rate is 10 mu m/s with healed route having mean resistance of 8 k Omega across a 200 micron gap and depending on the materials and concentrations used. (C) 2015 AIP Publishing LLC.

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The temperature variation in the insulation around an electronic component, mounted on a horizontal circuit board is studied numerically. The flow is assumed to be laminar and fully developed. The effect of mixed convection and two different types of insulation are considered. The mass, momentum and energy conservation equations in the fluid and conduction equation in the insulation are solved using the SIMPLER algorithm. Computations are carried out for liquid Freon and water, for different conductivity ratios, and different Rayleigh numbers. It is demonstrated that the temperature variation within the insulation becomes important when the thermal conductivity of the insulation is less than ten times the thermal conductivity of the cooling medium.

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The technical developments and advances that have taken place thus far are reviewed in those areas impacting future phased array active aperture radar systems. The areas covered are printed circuit antennas and antenna arrays, GaAs MMIC design and fabrication leading to affordable transmitter-receiver (T-R) modules, and novel hardware and software developments. The use of fiber-optic distribution networks to interconnect the monolithically integrated optical components with the T-R modules is discussed. Beamforming and sidelobe control techniques for active phased array systems are also examined.

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A supercritical CO2 test facility is currently being developed at Indian Institute of Science, Bangalore, India to analyze the performance of a closed loop Brayton cycle for concentrated solar power (CSP) generation. The loop has been designed for an external heat input of 20 kW a pressure range of 75-135 bar, flow rate of 11 kg/min, and a maximum cycle temperature of 525 degrees C. The operation of the loop and the various parametric tests planned to be performed are discussed in this paper The paper addresses various aspects of the loop design with emphasis on design of various components such as regenerator and expansion device. The regenerator design is critical due to sharp property variations in CO2 occurring during the heat exchange process between the hot and cold streams. Two types of heat exchanger configurations 1) tube-in-tube (TITHE) and 2) printed circuit heat exchanger (PCHE) are analyzed and compared. A PCHE is found to be similar to 5 times compact compared to a TITHE for identical heat transfer and pressure drops. The expansion device is being custom designed to achieve the desired pressure drop for a range of operating temperatures. It is found that capillary of 5.5 mm inner diameter and similar to 2 meter length is sufficient to achieve a pressure drop from 130 to 75 bar at a maximum cycle temperature of 525 degrees C.

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This paper presents the design of a start up power circuit for a control power supply (CPS) which feeds power to the sub-systems of High Power Converters (HPC). The sub-systems such as gate drive card, annunciation card, protection and delay card etc; needs to be provided power for the operation of a HPC. The control power supply (CPS) is designed to operate over a wide range of input voltage from 90Vac to 270Vac. The CPS output supplies power at a desired voltage of Vout =24V to the auxiliary sub-systems of the HPC. During the starting, the power supply to the control circuitry of CPS in turn, is obtained using a separate start-up power supply. This paper discusses the various design issues of the start-up power circuit to ensure that start-up and shut down of the CPS occurs reliably. The CPS also maintains the power factor close to unity and low total harmonic distortion in input current. The paper also provides design details of gate drive circuits employed for the CPS as well as the design of on-board power supply for the CPS. Index terms: control power supply, start-up power supply, DSFC, pre-regulator

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A simple equivalent circuit model for the analysis of dispersion and interaction impedance characteristics of serpentine folded-waveguide slow-wave structure was developed by considering the straight and curved portions of structure supporting the dominant TE10-mode of the rectangular waveguide. Expressions for the lumped capacitance and inductance per period of the slow-wave structure were derived in terms of the physical dimensions of the structure, incorporating the effects of the beam-hole in the lumped parameters. The lumped parameters were subsequently interpreted for obtaining the dispersion and interaction impedance characteristics of the structure. The analysis was simple yet accurate in predicting the dispersion and interaction impedance behaviour at millimeter-wave frequencies. The analysis was benchmarked against measurement as well as with 3D electromagnetic modeling using MAFIA for two typical slow-wave structures (one at the Ka-band and the other at the W-band) and close agreement observed.