A Simple Charge Model for Symmetric Double-Gate MOSFETs Adapted to Gate-Oxide-Thickness Asymmetry

Surface-potential-based compact charge models for symmetric double-gate metal-oxide-semiconductor field-effect transistors (SDG-MOSFETs) are based on the fundamental assumption of having equal oxide thicknesses for both gates. However, for practical devices, there will always be some amount of asymmetry between the gate oxide thicknesses due to process variations and uncertainties, which can affect device performance significantly. In this paper, we propose a simple surface-potential-based charge model, which is applicable for tied double-gate MOSFETs having same gate work function but could have any difference in gate oxide thickness. The proposed model utilizes the unique so-far-unexplored quasi-linear relationship between the surface potentials along the channel. In this model, the terminal charges could be computed by basic arithmetic operations from the surface potentials and applied biases, and thus, it could be implemented in any circuit simulator very easily and extendable to short-channel devices. We also propose a simple physics-based perturbation technique by which the surface potentials of an asymmetric device could be obtained just by solving the input voltage equation of SDG devices for small asymmetry cases. The proposed model, which shows excellent agreement with numerical and TCAD simulations, is implemented in a professional circuit simulator through the Verilog-A interface and demonstrated for a 101-stage ring oscillator simulation. It is also shown that the proposed model preserves the source/drain symmetry, which is essential for RF circuit design.

Entanglement production due to quench dynamics of an anisotropic XY chain in a transverse field

We compute concurrence and negativity as measures of two-spin entanglement generated by a power-law quench (characterized by a rate tau(-1) and an exponent alpha) which takes an anisotropic XY chain in a transverse field through a quantum critical point (QCP). We show that only spins separated by an even number of lattice spacings get entangled in such a process. Moreover, there is a critical rate of quench, tau(-1)(c), above which no two-spin entanglement is generated; the entire entanglement is multipartite. The ratio of the entanglements between consecutive even neighbors can be tuned by changing the quench rate. We also show that for large tau, the concurrence (negativity) scales as root alpha/tau(alpha/tau), and we relate this scaling behavior to defect production by the quench through a QCP.

Modeling of heat and mass transfer for solid state fermentation process in tray bioreactor

A mathematical model is developed to simulate oxygen consumption, heat generation and cell growth in solid state fermentation (SSF). The fungal growth on the solid substrate particles results in the increase of the cell film thickness around the particles. The model incorporates this increase in the biofilm size which leads to decrease in the porosity of the substrate bed and diffusivity of oxygen in the bed. The model also takes into account the effect of steric hindrance limitations in SSF. The growth of cells around single particle and resulting expansion of biofilm around the particle is analyzed for simplified zero and first order oxygen consumption kinetics. Under conditions of zero order kinetics, the model predicts upper limit on cell density. The model simulations for packed bed of solid particles in tray bioreactor show distinct limitations on growth due to simultaneous heat and mass transport phenomena accompanying solid state fermentation process. The extent of limitation due to heat and/or mass transport phenomena is analyzed during different stages of fermentation. It is expected that the model will lead to better understanding of the transport processes in SSF, and therefore, will assist in optimal design of bioreactors for SSF.

Water balance modelling in a tropical watershed under deciduous forest (Mule Hole, India): Regolith matric storage buffers the groundwater recharge process

Accurate estimations of water balance are needed in semi-arid and sub-humid tropical regions, where water resources are scarce compared to water demand. Evapotranspiration plays a major role in this context, and the difficulty to quantify it precisely leads to major uncertainties in the groundwater recharge assessment, especially in forested catchments. In this paper, we propose to assess the importance of deep unsaturated regolith and water uptake by deep tree roots on the groundwater recharge process by using a lumped conceptual model (COMFORT). The model is calibrated using a 5 year hydrological monitoring of an experimental watershed under dry deciduous forest in South India (Mule Hole watershed). The model was able to simulate the stream discharge as well as the contrasted behaviour of groundwater table along the hillslope. Water balance simulated for a 32 year climatic time series displayed a large year-to-year variability, with alternance of dry and wet phases with a time period of approximately 14 years. On an average, input by the rainfall was 1090 mm year(-1) and the evapotranspiration was about 900 mm year(-1) out of which 100 mm year(-1) was uptake from the deep saprolite horizons. The stream flow was 100 mm year(-1) while the groundwater underflow was 80 mm year(-1). The simulation results suggest that (i) deciduous trees can uptake a significant amount of water from the deep regolith, (ii) this uptake, combined with the spatial variability of regolith depth, can account for the variable lag time between drainage events and groundwater rise observed for the different piezometers and (iii) water table response to recharge is buffered due to the long vertical travel time through the deep vadose zone, which constitutes a major water reservoir. This study stresses the importance of long term observations for the understanding of hydrological processes in tropical forested ecosystems. (C) 2009 Elsevier B.V. All rights reserved.

Understanding the Knowledge Needs of Designers During Design Process in Industry

Product success is substantially influenced by satisfaction of knowledge needs of designers, and many tools and methods have been proposed to support these needs. However, adoption of these methods in industry is minimal. This may be due to an inadequate understanding of the knowledge needs of designers in industry. This research attempts to develop a better understanding of these needs by undertaking descriptive studies in an industry. We propose a taxonomy of knowledge, and evaluate this by analyzing the questions asked by the designers involved in the study during their interactions. Using the taxonomy, we converted the questions asked into a generic form. The generic questions provide an understanding about what knowledge must be captured during design, and what its structure should be.

The process of technological innovations in small enterprises: the Indian way

This paper probes how two small foundries in Belgaum, Karnataka State, India, have achieved technological innovations successfully based on their technological capability and customer needs, enabling them to sail through the competitive environment. This study brought out that technically qualified entrepreneurs of both the foundries have carried out technological innovations, mainly due to their self-motivation and self-efforts. Changing product designs, as desired or directed by the customers, cost reduction, quality improvement and import substitution through reverse engineering are the characteristics of these technological innovations. These incremental innovations have enabled the entrepreneurs of the two foundries to enhance competitiveness, grow in the domestic market and penetrate the international market and grow in size over time.

The process of technological innovations in small enterprises: the Indian way

This paper probes how two small foundries in Belgaum, Karnataka State, India, have achieved technological innovations successfully based on their technological capability and customer needs, enabling them to sail through the competitive environment. This study brought out that technically qualified entrepreneurs of both the foundries have carried out technological innovations, mainly due to their self-motivation and self-efforts. Changing product designs, as desired or directed by the customers, cost reduction, quality improvement and import substitution through reverse engineering are the characteristics of these technological innovations. These incremental innovations have enabled the entrepreneurs of the two foundries to enhance competitiveness, grow in the domestic market and penetrate the international market and grow in size over time.

Minimizing total weighted tardiness on a batch-processing machine with non-agreeable release times and due dates

This study considers the scheduling problem observed in the burn-in operation of semiconductor final testing, where jobs are associated with release times, due dates, processing times, sizes, and non-agreeable release times and due dates. The burn-in oven is modeled as a batch-processing machine which can process a batch of several jobs as long as the total sizes of the jobs do not exceed the machine capacity and the processing time of a batch is equal to the longest time among all the jobs in the batch. Due to the importance of on-time delivery in semiconductor manufacturing, the objective measure of this problem is to minimize total weighted tardiness. We have formulated the scheduling problem into an integer linear programming model and empirically show its computational intractability. Due to the computational intractability, we propose a few simple greedy heuristic algorithms and meta-heuristic algorithm, simulated annealing (SA). A series of computational experiments are conducted to evaluate the performance of the proposed heuristic algorithms in comparison with exact solution on various small-size problem instances and in comparison with estimated optimal solution on various real-life large size problem instances. The computational results show that the SA algorithm, with initial solution obtained using our own proposed greedy heuristic algorithm, consistently finds a robust solution in a reasonable amount of computation time.

Studies on design, fabrication and reliability assessment of embedded passives on a high-density interconnect (HDI) organic substrate using a sequential build-up process

One of the foremost design considerations in microelectronics miniaturization is the use of embedded passives which provide practical solution. In a typical circuit, over 80 percent of the electronic components are passives such as resistors, inductors, and capacitors that could take up to almost 50 percent of the entire printed circuit board area. By integrating passive components within the substrate instead of being on the surface, embedded passives reduce the system real estate, eliminate the need for discrete and assembly, enhance electrical performance and reliability, and potentially reduce the overall cost. Moreover, it is lead free. Even with these advantages, embedded passive technology is at a relatively immature stage and more characterization and optimization are needed for practical applications leading to its commercialization.This paper presents an entire process from design and fabrication to electrical characterization and reliability test of embedded passives on multilayered microvia organic substrate. Two test vehicles focusing on resistors and capacitors have been designed and fabricated. Embedded capacitors in this study are made with polymer/ceramic nanocomposite (BaTiO3) material to take advantage of low processing temperature of polymers and relatively high dielectric constant of ceramics and the values of these capacitors range from 50 pF to 1.5 nF with capacitance per area of approximately 1.5 nF/cm(2). Limited high frequency measurement of these capacitors was performed. Furthermore, reliability assessments of thermal shock and temperature humidity tests based on JEDEC standards were carried out. Resistors used in this work have been of three types: 1) carbon ink based polymer thick film (PTF), 2) resistor foils with known sheet resistivities which are laminated to printed wiring board (PWB) during a sequential build-up (SBU) process and 3) thin-film resistor plating by electroless method. Realization of embedded resistors on conventional board-level high-loss epoxy (similar to 0.015 at 1 GHz) and proposed low-loss BCB dielectric (similar to 0.0008 at > 40 GHz) has been explored in this study. Ni-P and Ni-W-P alloys were plated using conventional electroless plating, and NiCr and NiCrAlSi foils were used for the foil transfer process. For the first time, Benzocyclobutene (BCB) has been proposed as a board level dielectric for advanced System-on-Package (SOP) module primarily due to its attractive low-loss (for RF application) and thin film (for high density wiring) properties.Although embedded passives are more reliable by eliminating solder joint interconnects, they also introduce other concerns such as cracks, delamination and component instability. More layers may be needed to accommodate the embedded passives, and various materials within the substrate may cause significant thermo -mechanical stress due to coefficient of thermal expansion (CTE) mismatch. In this work, numerical models of embedded capacitors have been developed to qualitatively examine the effects of process conditions and electrical performance due to thermo-mechanical deformations.Also, a prototype working product with the board level design including features of embedded resistors and capacitors are underway. Preliminary results of these are presented.

Kinetic evolution studies of silver nanoparticles in a bio-based green synthesis process

Silver nanoparticles are being extensively studied due to their widespread applications and unique properties. In the present study, the growth kinetics of silver nanoparticles as synthesized on reduction of silver nitrate solution by aqueous extract of Azadirachta indica leaves was investigated. The formation of silver nanoparticles was preliminarily monitored by measuring the absorption maxima at different time intervals after adding the reducing agent to the silver salt solution (0.5, 1, 1.5, 2, 2.5, 3, 3.5 and 4 h). At different time points characterization studies were conducted using X-ray diffraction studies, FT-IR techniques, zeta potential studies and transmission electron microscopy. The total available silver in the reaction medium was determined at different durations using ICP-OES. The changes in reduction potential in the medium were also monitored using potentiometric analysis. The results confirm a definite change in the medium pertaining to formation of the stable nanoparticles after 2 h, and a significant increase in the agglomeration tendency after 4 h of interaction. The growth kinetic data of the nanoparticles till 3.5 h was found to fit the LSW model confirming diffusion limited growth. (C) 2011 Elsevier B.V. All rights reserved.

Process Variation Aware Estimation of Static Leakage Power in Nano-CMOS

We present a statistical methodology for leakage power estimation, due to subthreshold and gate tunneling leakage, in the presence of process variations, for 65 nm CMOS. The circuit leakage power variations is analyzed by Monte Carlo (MC) simulations, by characterizing NAND gate library. A statistical “hybrid model” is proposed, to extend this methodology to a generic library. We demonstrate that hybrid model based statistical design results in up to 95% improvement in the prediction of worst to best corner leakage spread, with an error of less than 0.5%, with respect to worst case design.

Evolution of 1/f α noise during electromigration stressing of metal film: Spectral signature of electromigration process

In this paper we report a systematic study of low-frequency 1/fα resistance fluctuation in a metal film at different stages of electromigration. The resistance fluctuation (noise) measurement was carried out in presence of a dc electromigration stressing current. We observe that in addition to the increase in the spectral power SV(f), the frequency dependence of the spectral power changes as the electromigration process progresses and the exponent α starts to change from 1 to higher value closer to 1.5. We interpret this change in α as arising due to an additional contribution to the spectral power with a 1/f3/2 component, which starts to contribute as the electromigration process progresses. This additional component SV(f) ∼ 1/f3/2 has been suggested to originate from long range diffusion that would accompany any electromigration process. The experimental observation finds support in a model simulation, where we also find that the enhancement of noise during electromigration stressing is accompanied by a change in spectral power frequency dependence.

Fatigue crack growth due to overloads in plain concrete using scaling laws

Scaling laws are represented in power law form and can be utilized to extract the characteristic properties of a new phenomenon with the help of self-similar solutions. In this work, an attempt has been made to propose a scaling law analytically, for plain concrete when subjected to variable amplitude loading. Due to the application of overload on concrete structures, acceleration in the crack growth process takes place. A closed form expression has been developed to capture the acceleration in crack growth rate in conjunction with the principles of dimensional analysis and self-similarity. The proposed model accounts for parameters such as, the tensile strength, fracture toughness, overload effect and the structural size. Knowing the governed and the governing parameters of the physical problem and by using the concepts of self-similarity, a relationship is obtained between the different parameters involved. The predicted results are compared with experimental crack growth data for variable amplitude loading and are found to capture the overload effect with sufficient accuracy. Through a sensitivity analysis, fracture toughness is found to be the most dominant parameter in accelerating the crack length due to application of overload.

Influence of surface area to volume ratio of fuel particles on gasification process in a fixed bed

The paper addresses the effect of particle size on tar generation in a fixed bed gasification system. Pyrolysis, a diffusion limited process, depends on the heating rate and the surface area of the particle influencing the release of the volatile fraction leaving behind residual char. The flaming time has been estimated for different biomass samples. It is found that the flaming time for wood flakes is almost one fourth than that of coconut shells for same equivalent diameter fuel samples. The particle density of the coconut shell is more than twice that of wood spheres, and almost four times compared with wood flakes; having a significant influence on the flaming time. The ratio of the particle surface area to that of an equivalent diameter is nearly two times higher for flakes compared with wood pieces. Accounting for the density effect, on normalizing with density of the particle, the flaming rate is double in the case of wood flakes or coconut shells compared with the wood sphere for an equivalent diameter. This is due to increased surface area per unit volume of the particle. Experiments are conducted on estimation of tar content in the raw gas for wood flakes and standard wood pieces. It is observed that the tar level in the raw gas is about 80% higher in the case of wood flakes compared with wood pieces. The analysis suggests that the time for pyrolysis is lower with a higher surface area particle and is subjected to fast pyrolysis process resulting in higher tar fraction with low char yield. Increased residence time with staged air flow has a better control on residence time and lower tar in the raw gas. (C) 2014 International Energy Initiative. Published by Elsevier Inc. All rights reserved.

Effect of Process Deviations on Performance of Piezoresistive Pressure Sensors

Diaphragm thickness and the corresponding piezoresistor locations change due to over or under etching in bulk micromachined piezoresistive pressure sensor which intern influences the device performance. In the present work, variation of sensitivity and nonlinearity of a micro electro mechanical system low pressure sensor is investigated. The sensor is modeled using finite element method to analyze the variation of sensitivity and nonlinearity with diaphragm thickness. To verify the simulated results, the sensors with different diaphragm thicknesses are fabricated. The models are verified by comparing the calculated results with experimental data. This study is potentially useful for the researchers as most of the times the diaphragm is either over-etched or under-etched due to inherent variation in wafer thickness and involving manual operations.