External support and innovation performance of SMEs in Bangalore: Role of firm level factors

This paper probes the role of internal factors in SMEs in obtaining external support and achieving innovation performance in the context of auto component, electronics and machine tool industries of Bangalore in India. Using step-wise logistic regression analysis, the study found that only if SMEs have internal technical competence in terms of technically qualified entrepreneur, an exclusive design centre, and innovate more frequently, they will be able to obtain external support. Further using step-wise multiple regression the study concluded that SMEs which have come up to implement innovative ideas or exploit market opportunities and which have obtained external support with technically qualified entrepreneurs are able to exhibit better innovation performance.

Linear time geometrical design rule checker based on quadtree representation of VLSI mask layouts

An efficient geometrical design rule checker is proposed, based on operations on quadtrees, which represent VLSI mask layouts. The time complexity of the design rule checker is O(N), where N is the number of polygons in the mask. A pseudoPascal description is provided of all the important algorithms for geometrical design rule verification.

Computer-Aided Drug Design of Pyranopyrazoles and Related Compounds for Checkpoint Kinase-1

Checkpoint-1 kinase plays an important role in the G(2)M cell cycle control, therefore its inhibition by small molecules is of great therapeutic interest in oncology. In this paper, we have reported the virtual screening of an in-house library of 2499 pyranopyrazole derivatives against the ATP-binding site of Chk1 kinase using Glide 5.0 program, which resulted in six hits. All these ligands were docked into the site forming most crucial interactions with Cys87, Glu91 and Leu15 residues. From the observed results these ligands are suggested to be potent inhibitors of Chk1 kinase with sufficient scope for further elaboration.

Design of a climate-responsive BIPV research facility in Bangalore

This paper describes the design and erection of a climate-responsive Building Integrated Photovoltaic (BIPV) structure in Bangalore, (12.58 N, 77.38 E) in the state of Karnataka, India. Building Integrated Photovoltaics integrate solar panels as part of a building structure (roofs and walls) with an aim to achieve self-sufficiency in the operation and occupant-comfort energy requirements. A joint collaboration between the Centre for Sustainable Technologies, Indian Institute of Science (IISc) and Bharat Heavy Electricals Limited (BHEL) is setting up a 70,000 US$ facility for research in BIPV structures. The structure utilizes low energy building materials like Stabilized Mud Blocks (SMB) integrated with a PV roof. Numerous challenges were overcome in the design of the BIPV roof including mechanisms for natural thermal comfort in response to Bangalore's climatic conditions. The paper presents the challenges overcome in the design and construction of a low energy, climate-responsive BIPV structure.

Understanding the Knowledge Needs of Designers During Design Process in Industry

Product success is substantially influenced by satisfaction of knowledge needs of designers, and many tools and methods have been proposed to support these needs. However, adoption of these methods in industry is minimal. This may be due to an inadequate understanding of the knowledge needs of designers in industry. This research attempts to develop a better understanding of these needs by undertaking descriptive studies in an industry. We propose a taxonomy of knowledge, and evaluate this by analyzing the questions asked by the designers involved in the study during their interactions. Using the taxonomy, we converted the questions asked into a generic form. The generic questions provide an understanding about what knowledge must be captured during design, and what its structure should be.

Power Optimal Network-on-Chip Interconnect Design

A large part of today's multi-core chips is interconnect. Increasing communication complexity has made essential new strategies for interconnects, such as Network on Chip. Power dissipation in interconnects has become a substantial part of the total power dissipation. Techniques to reduce interconnect power have thus become a necessity. In this paper, we present a design methodology that gives values of bus width for interconnect links, frequency of operation for routers, in Network on Chip scenario that satisfy required throughput and dissipate minimal switching power. We develop closed form analytical expressions for the power dissipation, with bus width and frequency as variables and then use Lagrange multiplier method to arrive at the optimal values. We present a 4 port router in 90 nm technology library as case study. The results obtained from analysis are discussed.

Investigating novelty-outcome relationships in engineering design

Design creativity involves developing novel and useful solutions to design problems The research in this article is an attempt to understand how novelty of a design resulting from a design process is related to the kind of outcomes. described here as constructs, involved in the design process A model of causality, the SAPPhIRE model, is used as the basis of the analysis The analysis is based on previous research that shows that designing involves development and exploration of the seven basic constructs of the SAPPhIRE model that constitute the causal connection between the various levels of abstraction at which a design can be described The constructs am state change, action, parts. phenomenon. input. organs. and effect The following two questions are asked. Is there a relationship between novelty and the constructs? If them is a relationship, what is the degree of this relationship? A hypothesis is developed to answer the questions an increase in the number and variety of ideas explored while designing should enhance the variety of concept space. leading to an increase in the novelty of the concept space Eight existing observational studies of designing sessions are used to empirically validate the hypothesis Each designing session involves an individual designer. experienced or novice. solving a design problem by producing concepts and following a think-aloud protocol. The results indicate dependence of novelty of concept space on variety of concept space and dependence of variety of concept space on variety of idea space. thereby validating the hypothesis The Jesuits also reveal a strong correlation between novelty and the constructs, correlation value decreases as the abstraction level of the constructs reduces. signifying the importance of using constructs at higher abstraction levels for enhancing novelty

A Survey on Cascaded Multilevel Inverters

Cascaded multilevel inverters synthesize a medium-voltage output based on a series connection of power cells which use standard low-voltage component configurations. This characteristic allows one to achieve high-quality output voltages and input currents and also outstanding availability due to their intrinsic component redundancy. Due to these features, the cascaded multilevel inverter has been recognized as an important alternative in the medium-voltage inverter market. This paper presents a survey of different topologies, control strategies and modulation techniques used by these inverters. Regenerative and advanced topologies are also discussed. Applications where the mentioned features play a key role are shown. Finally, future developments are addressed.

High performance VLSI architecture design for H.264 CAVLC decoder

H.264 video standard achieves high quality video along with high data compression when compared to other existing video standards. H.264 uses context-based adaptive variable length coding (CAVLC) to code residual data in Baseline profile. In this paper we describe a novel architecture for CAVLC decoder including coeff-token decoder, level decoder total-zeros decoder and run-before decoder UMC library in 0.13 mu CMOS technology is used to synthesize the proposed design. The proposed design reduces chip area and improves critical path performance of CAVLC decoder in comparison with [1]. Macroblock level (including luma and chroma) pipeline processing for CAVLC is implemented with an average of 141 cycles (including pipeline buffering) per macroblock at 250MHz clock frequency. To compare our results with [1] clock frequency is constrained to 125MHz. The area required for the proposed architecture is 17586 gates, which is 22.1% improvement in comparison to [1]. We obtain a throughput of 1.73 * 10(6) macroblocks/second, which is 28% higher than that reported in [1]. The proposed design meets the processing requirement of 1080HD [5] video at 30frames/seconds.

Studies on design, fabrication and reliability assessment of embedded passives on a high-density interconnect (HDI) organic substrate using a sequential build-up process

One of the foremost design considerations in microelectronics miniaturization is the use of embedded passives which provide practical solution. In a typical circuit, over 80 percent of the electronic components are passives such as resistors, inductors, and capacitors that could take up to almost 50 percent of the entire printed circuit board area. By integrating passive components within the substrate instead of being on the surface, embedded passives reduce the system real estate, eliminate the need for discrete and assembly, enhance electrical performance and reliability, and potentially reduce the overall cost. Moreover, it is lead free. Even with these advantages, embedded passive technology is at a relatively immature stage and more characterization and optimization are needed for practical applications leading to its commercialization.This paper presents an entire process from design and fabrication to electrical characterization and reliability test of embedded passives on multilayered microvia organic substrate. Two test vehicles focusing on resistors and capacitors have been designed and fabricated. Embedded capacitors in this study are made with polymer/ceramic nanocomposite (BaTiO3) material to take advantage of low processing temperature of polymers and relatively high dielectric constant of ceramics and the values of these capacitors range from 50 pF to 1.5 nF with capacitance per area of approximately 1.5 nF/cm(2). Limited high frequency measurement of these capacitors was performed. Furthermore, reliability assessments of thermal shock and temperature humidity tests based on JEDEC standards were carried out. Resistors used in this work have been of three types: 1) carbon ink based polymer thick film (PTF), 2) resistor foils with known sheet resistivities which are laminated to printed wiring board (PWB) during a sequential build-up (SBU) process and 3) thin-film resistor plating by electroless method. Realization of embedded resistors on conventional board-level high-loss epoxy (similar to 0.015 at 1 GHz) and proposed low-loss BCB dielectric (similar to 0.0008 at > 40 GHz) has been explored in this study. Ni-P and Ni-W-P alloys were plated using conventional electroless plating, and NiCr and NiCrAlSi foils were used for the foil transfer process. For the first time, Benzocyclobutene (BCB) has been proposed as a board level dielectric for advanced System-on-Package (SOP) module primarily due to its attractive low-loss (for RF application) and thin film (for high density wiring) properties.Although embedded passives are more reliable by eliminating solder joint interconnects, they also introduce other concerns such as cracks, delamination and component instability. More layers may be needed to accommodate the embedded passives, and various materials within the substrate may cause significant thermo -mechanical stress due to coefficient of thermal expansion (CTE) mismatch. In this work, numerical models of embedded capacitors have been developed to qualitatively examine the effects of process conditions and electrical performance due to thermo-mechanical deformations.Also, a prototype working product with the board level design including features of embedded resistors and capacitors are underway. Preliminary results of these are presented.

A course for teaching design research methodology

Design research informs and supports practice by developing knowledge to improve the chances of producing successful products.Training in design research has been poorly supported. Design research uses human and natural/technical sciences, embracing all facets of design; its methods and tools are adapted from both these traditions. However, design researchers are rarely trained in methods from both the traditions. Research in traditional sciences focuses primarily on understanding phenomena related to human, natural, or technical systems. Design research focuses on supporting improvement of such systems, using understanding as a necessary but not sufficient step, and it must embrace methods for both understanding reality and developing support for its improvement. A one-semester, postgraduate-level, credited course that has been offered since 2002, entitled Methodology for Design Research, is described that teaches a methodology for carrying out research into design. Its steps are to clarify research success; to understand relevant phenomena of design and how these influence success; to use this to envision design improvement and develop proposals for supporting improvement; to evaluate support for its influence on success; and, if unacceptable, to modify, support, or improve the understanding of success and its links to the phenomena of design. This paper highlights some major issues about the status of design research and describes how design research methodology addresses these. The teaching material, model of delivery, and evaluation of the course on methodology for design research are discussed.

A method for Estimating the Degree of Uncertainty With Respect to Life Cycle Assessment During Design

Life cycle assessment (LCA) is used to estimate a product's environmental impact. Using LCA during the earlier stages of design may produce erroneous results since information available on the product's lifecycle is typically incomplete at these stages. The resulting uncertainty must be accounted for in the decision-making process. This paper proposes a method for estimating the environmental impact of a product's life cycle and the associated degree of uncertainty of that impact using information generated during the design process. Total impact is estimated based on aggregation of individual product life cycle processes impacts. Uncertainty estimation is based on assessing the mismatch between the information required and the information available about the product life cycle in each uncertainty category, as well as their integration. The method is evaluated using pre-defined scenarios with varying uncertainty. DOI: 10.1115/1.4002163]

Optimization and design of energy transport system for solar cooking application

This paper proposes a hybrid solar cooking system where the solar energy is transported to the kitchen. The thermal energy source is used to supplement the Liquefied Petroleum Gas (LPG) that is in common use in kitchens. Solar energy is transferred to the kitchen by means of a circulating fluid. Energy collected from sun is maximized by changing the flow rate dynamically. This paper proposes a concept of maximum power point tracking (MPPT) for the solar thermal collector. The diameter of the pipe is selected to optimize the overall energy transfer. Design and sizing of different components of the system are explained. Concept of MPPT is validated with simulation and experimental results. (C) 2010 Elsevier Ltd. All rights reserved.

A methodology for supporting ``transfer'' in biomimetic design

Biomimetics involves transfer from one or more biological examples to a technical system. This study addresses four questions. What are the essential steps in a biomimetic process? What is transferred? How can the transferred knowledge be structured in a way useful for biologists and engineers? Which guidelines can be given to support transfer in biomimetic design processes? In order to identify the essential steps involved in carrying out biomimetics, several procedures found in the literature were summarized, and four essential steps that are common across these procedures were identified. For identification of mechanisms for transfer, 20 biomimetic examples were collected and modeled according to a model. of causality called the SAPPhIRE model. These examples were then analyzed for identifying the underlying similarity between each biological and corresponding analogue technical system. Based on the SAPPhIRE model, four levels of abstraction at which transfer takes place were identified. Taking into account similarity, the biomimetic examples were assigned to the appropriate levels of abstraction of transfer. Based on the essential steps and the levels of transfer, guidelines for supporting transfer in biomimetic design were proposed and evaluated using design experiments. The 20 biological and analogue technical systems that were analyzed were similar in the physical effects used and at the most abstract levels of description of their functionality, but they were the least similar at the lowest levels of abstraction: the parts involved. Transfer most often was carried out at the physical effect level of abstraction. Compared to a generic set of guidelines based on the literature, the proposed guidelines improved design performance by about 60%. Further, the SAPPhIRE model turned out to be a useful representation for modeling complex biological systems and their functionality. Databases of biological systems, which are structured using the SAPPhIRE model, have the potential to aid biomimetic concept generation.