174 resultados para Modular product architecture

em Indian Institute of Science - Bangalore - Índia


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An automated geo-hazard warning system is the need of the hour. It is integration of automation in hazard evaluation and warning communication. The primary objective of this paper is to explain a geo-hazard warning system based on Internet-resident concept and available cellular mobile infrastructure that makes use of geo-spatial data. The functionality of the system is modular in architecture having input, understanding, expert, output and warning modules. Thus, the system provides flexibility in integration between different types of hazard evaluation and communication systems leading to a generalized hazard warning system. The developed system has been validated for landslide hazard in Indian conditions. It has been realized through utilization of landslide causative factors, rainfall forecast from NASA's TRMM (Tropical Rainfall Measuring Mission) and knowledge base of landslide hazard intensity map and invokes the warning as warranted. The system evaluated hazard commensurate with expert evaluation within 5-6 % variability, and the warning message permeability has been found to be virtually instantaneous, with a maximum time lag recorded as 50 s, minimum of 10 s. So it could be concluded that a novel and stand-alone system for dynamic hazard warning has been developed and implemented. Such a handy system could be very useful in a densely populated country where people are unaware of the impending hazard.

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Simultaneous consideration of both performance and reliability issues is important in the choice of computer architectures for real-time aerospace applications. One of the requirements for such a fault-tolerant computer system is the characteristic of graceful degradation. A shared and replicated resources computing system represents such an architecture. In this paper, a combinatorial model is used for the evaluation of the instruction execution rate of a degradable, replicated resources computing system such as a modular multiprocessor system. Next, a method is presented to evaluate the computation reliability of such a system utilizing a reliability graph model and the instruction execution rate. Finally, this computation reliability measure, which simultaneously describes both performance and reliability, is applied as a constraint in an architecture optimization model for such computing systems. Index Terms-Architecture optimization, computation

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This paper presents the architecture of a fault-tolerant, special-purpose multi-microprocessor system for solving Partial Differential Equations (PDEs). The modular nature of the architecture allows the use of hundreds of Processing Elements (PEs) for high throughput. Its performance is evaluated by both analytical and simulation methods. The results indicate that the system can achieve high operation rates and is not sensitive to inter-processor communication delay.

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The binding of xylo-oligosaccharides to Chainia endoxylanase resulted in a decrease in fluorescence intensity of the enzyme with the formation of 1:1 complex. Equilibrium and thermodynamic parameters of ligand binding were determined by fluorescence titrations and titration calorimetry. The affinity of xylanase for the oligosaccharides increases in the order X-2 < X-3 < X-4 less than or equal to X-5. Contributions from the enthalpy towards the free energy change decreased with increasing chain length from X-2 to X-4, whereas an increase in entropy was observed, the change in enthalpy and entropy of binding being compensatory. The entropically driven binding process suggested that hydrophobic interactions as well as hydrogen bonds play a predominant role in ligand binding.

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A dual representation scheme for performing arithmetic modulo an arbitrary integer M is presented. The coding scheme maps each integer N in the range 0 <= N < M into one of two representations, each being identified by its most significant bit. The encoding of numbers is straightforward and the problem of checking for unused combinations is eliminated.

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The construction of well-defined 3D architectures is one of the greatest challenges of self-assembly. Nanofabrication through molecular self-assembly has resulted in the formation of DNA polyhedra with the connectivities of cubes,[1] tetrahedra,[2,3] octahedra,[4, 5] dodecahedra,[3] and buckminsterfullerene.[ 3] DNA polyhedra could also function as nanocapsules and thereby enable the targeted delivery of entities encapsulated from solution. Key to realizing this envisaged function is the construction of complex polyhedra that maximize encapsulation volumes while preserving small. pore size.

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Oxygen Consumption by alternative oxidase (AOX), present in mitochondria of many angiosperms, is known to be cyanide-resistant in contrast to cytochrome oxidase. Its activity in potato tuber (Solarium tuberosum L.) was induced following chilling treatment at 4 degrees C.About half of the total O-2 consumption of succinate oxidation in such mitochondria was found to be sensitive to SHAM, a known inhibitor of AOX activity. Addition of catalase to the reaction mixture of AOX during the reaction decreased the rate of SHAM-sensitive oxygen consumption by nearly half, and addition at the end of the reaction released nearly half of the consumed oxygen by AOX, both typical of catalase action on H2O2. These findings with catalase suggest that the product of reduction of AOX is H2O2 and not H2O, as previously Surmised. In potatoes Subjected to chill stress (4 degrees C) for periods of 3, 5 and >= 8 days the activity of AOX in mitochondria increased progressively with a corresponding increase in the AOX protein detected by immunoblot of the protein.

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This paper presents the architecture and the VHDL design of an integer 2-D DCT used in the H.264/AVC. The 2-D DCT computation is performed by exploiting it’s orthogonality and separability property. The symmetry of the forward and inverse transform is used in this implementation. To reduce the computation overhead for the addition, subtraction and multiplication operations, we analyze the suitability of carry-free position independent residue number system (RNS) for the implementation of 2-D DCT. The implementation has been carried out in VHDL for Altera FPGA. We used the negative number representation in RNS, bit width analysis of the transforms and dedicated registers present in the Logic element of the FPGA to optimize the area. The complexity and efficiency analysis show that the proposed architecture could provide higher through-put.

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An approach towards the highly functionalized bicyclo[3.3.1]nonan-9-one core of the complex PPAP-based natural product hyperforin, with the full complement of prenyl substituents in required stereo-disposition, is delineated.

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Packet forwarding is a memory-intensive application requiring multiple accesses through a trie structure. With the requirement to process packets at line rates, high-performance routers need to forward millions of packets every second with each packet needing up to seven memory accesses. Earlier work shows that a single cache for the nodes of a trie can reduce the number of external memory accesses. It is observed that the locality characteristics of the level-one nodes of a trie are significantly different from those of lower level nodes. Hence, we propose a heterogeneously segmented cache architecture (HSCA) which uses separate caches for level-one and lower level nodes, each with carefully chosen sizes. Besides reducing misses, segmenting the cache allows us to focus on optimizing the more frequently accessed level-one node segment. We find that due to the nonuniform distribution of nodes among cache sets, the level-one nodes cache is susceptible t high conflict misses. We reduce conflict misses by introducing a novel two-level mapping-based cache placement framework. We also propose an elegant way to fit the modified placement function into the cache organization with minimal increase in access time. Further, we propose an attribute preserving trace generation methodology which emulates real traces and can generate traces with varying locality. Performanc results reveal that our HSCA scheme results in a 32 percent speedup in average memory access time over a unified nodes cache. Also, HSC outperforms IHARC, a cache for lookup results, with as high as a 10-fold speedup in average memory access time. Two-level mappin further enhances the performance of the base HSCA by up to 13 percent leading to an overall improvement of up to 40 percent over the unified scheme.

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In this paper, three parallel polygon scan conversion algorithms have been proposed, and their performance when executed on a shared bus architecture has been compared. It has been shown that the parallel algorithm that does not use edge coherence performs better than those that use edge coherence. Further, a multiprocessing architecture has been proposed to execute the parallel polygon scan conversion algorithms more efficiently than a single shared bus architecture.

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Rice husk ash (about 95% silica) with known physical and chemical characteristics has been reacted with lime and water. The setting process for a lime-excess and a lime-deficient mixture has been investigated. The product of the reaction has been shown to be a calcium silicate hydrate, C-S-H(I)+ by a combination of thermal analysis, XRD and electron microscopy. Formation of C-S-H(I) accounts for the strength of lime-rice husk ash cement.

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A short, diversity-oriented synthesis that follows a biomimetic route to the marine natural product liphagal, from a commercially available building block, is delineated.

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This paper describes a method for the dynamic digital simulation of HVDC transmission systems. The method employs a novel modular converter representation during both normal and abnormal conditions.