Low-voltage and high-current delay characteristics of a simple triggered vacuum gap

Low-voltage and high-current switching delay characteristics of a simple triggered vacuum gap (TVG) are described using lead zirconate titanate as the dielectric material in the auxiliary gap. This TVG has superior performance at high currents (up to 14 kA was studied) with regard to delay, reliable firing and extended life as compared to the one using either supramica or silicon carbide. The total delay consists of three intervals: to break down the auxiliary gap, to propagate the trigger plasma and to break down the main gap. The data on the influence of the various parameters like the trigger voltage, current, energy and the main circuit energy are given. It has been found that the delay due to the first two intervals is small compared to the third.

Low-voltage varistors from ZnO+CaMnO3 ceramics

: Varistors prepared from ZnO with CaMnO3 perovskite as the only forming additive, exhibit voltage-limiting current-voltage characteristics with nonlinearity coefficient alpha up to 380 at low voltages of 1.8-12 V/mm. High nonlinearity is observed only with a suitable combination of processing parameters. The most crucial of them are (i) initial formulation of ceramics and (ii) the sintering temperature and conditions of post-sinter annealing. An electrically active intergranular phase is formed between ZnO grains with the composition ranging from Ca4Mn6Zn4O17 to Ca4Mn8Zn3O19, which creates the n-p-n heterojunctions. The low-voltage nonlinearity originates as a result of higher concentration of Mn(III)/Mn(IV) present at the grain boundary layer regions, being charge compensated by zinc vacancies. Under the external electric field, the barrier height is lowered due to the uphill diffusion of holes mediated by the acceptor states. Above the turn-on voltages, the unhindered transport of charge carriers between grains generates high current density associated with large nonlinearity.

Low‐voltage varistors based on zinc antimony spinel Zn7Sb2O12

It is possible to prepare low‐voltage varistors from the zinc antimony spinel Zn7Sb2O12 with breakdown voltages in the range of 3–20 V and nonlinearity coefficient α=7–15. The varistor property is due to the formation of high ohmic potential barriers at the grain boundary regions on low‐ohmic n‐type grain interiors of the polycrystalline samples. The method of preparation of the spinel, synthesized by coprecipitation followed by annealing under restricted partial pressures of oxygen, controls the mixed valence states for antimony, namely, Sb3+ and Sb5+. This is critical in attaining high nonlinearity and lower breakdown voltages.

Low Voltage Firing Characteristics of a Simple Triggered Vacuum Gap

The firing characteristics of the simple triggered vacuum gap (TVG) using lead zirconate titanate as dielectric material in the triggered gap are described. This TVG has a long life of about 2000 firings without appreciable deterioration of the electrical properties for main discharge currents upto 3 kA and is much superior to these made with Supramica (Mycalex Corporation of America) and silicon carbide as used in our earlier investigations. The effects of the variation of trigger voltage, trigger curcit, trigger pulse duration, trigger pulse energy, main gap voltage, main gap separation and main circuit energy on the firing characteristics have been studied. Trigger resistance progressively decreases with the number of firings of the trigger gap and as well as of the main gap. This decrease in the trigger resistance is more pronounced for main discharge currents exceeding 10 kA. The minimum trigger current required for reliable firing decreases with increase of trigger voltage upto a threshold value of 1.2 kV and there-onwards saturates at 3.0 A. This value is less than that obtained with Supramica as dielectric material. One hundred percent firing probability of the TVG at main gap voltages as low as 50 V is possible and this low voltage breakdown of the main gap appears to be similar to the breakdown at low pressures between moving plasma by other workers. and the cold electrodes immersed in it, as reported.

Progressive fusion of reconstruction algorithms for low latency applications in compressed sensing

Recently, it has been shown that fusion of the estimates of a set of sparse recovery algorithms result in an estimate better than the best estimate in the set, especially when the number of measurements is very limited. Though these schemes provide better sparse signal recovery performance, the higher computational requirement makes it less attractive for low latency applications. To alleviate this drawback, in this paper, we develop a progressive fusion based scheme for low latency applications in compressed sensing. In progressive fusion, the estimates of the participating algorithms are fused progressively according to the availability of estimates. The availability of estimates depends on computational complexity of the participating algorithms, in turn on their latency requirement. Unlike the other fusion algorithms, the proposed progressive fusion algorithm provides quick interim results and successive refinements during the fusion process, which is highly desirable in low latency applications. We analyse the developed scheme by providing sufficient conditions for improvement of CS reconstruction quality and show the practical efficacy by numerical experiments using synthetic and real-world data. (C) 2013 Elsevier B.V. All rights reserved.

Energy Efficient Memory Decoder Design for Ultra-Low Voltage Systems

This paper presents a low energy memory decoder architecture for ultra-low-voltage systems containing multiple voltage domains. Due to limitations in scalability of memory supply voltages, these systems typically contain a core operating at subthreshold voltages and memories operating at a higher voltage. This difference in voltage provides a timing slack on the memory path as the core supply is scaled. The paper analyzes the feasibility and trade-offs in utilizing this timing slack to operate a greater section of memory decoder circuitry at the lower supply. A 256x16-bit SRAM interface has been designed in UMC 65nm low-leakage process to evaluate the above technique with the core and memory operating at 280 mV and 500 mV respectively. The technique provides a reduction of up to 20% in energy/cycle of the row decoder without any penalty in area and system-delay.

A Time-based Low Voltage Body Temperature Monitoring Unit

A neonatal temperature monitoring system operating in subthreshold regime that utilizes time mode signal processing is presented. Resistance deviations in a thermistor due to temperature variations are converted to delay variations that are subsequently quantized by a Delay measurement unit (DMU). The DMU does away with the need for any analog circuitry and is synthesizable entirely from digital logic. An FPGA implementation of the system demonstrates the viability of employing time mode signal processing, and measured results show that temperature resolution better than 0.1 degrees C can be achieved using this approach.

Multilevel inverters for low-power application

Multilevel inverters are an attractive solution in the medium-voltage and high-power applications. However in the low-power range also it can be a better solution compared to two-level inverters, if MOSFETs are used as devices switching in the order of 100 kHz. The effect of clamping diodes in the diode-clamped multilevel inverters play an important role in determining its efficiency. Power loss introduced by the reverse recovery of MOSFET body diode prohibits the use of MOSFET in hard-switched inverter legs. A technique of avoiding reverse recovery loss of MOSFET body diode in a three-level neutral point clamped inverter is suggested. The use of multilevel inverters topology enables operation at high switching frequency without sacrificing efficiency. High switching frequency of operation reduces the output filter requirement, which in turn helps in reducing the size of the inverter. This study elaborates the trade-off analysis to quantify the suitability of multilevel inverters in the low-power applications. Advantages of using a MOSFET-based three-level diode-clamped inverter for a PM motor drive and UPS systems are discussed.

A coaxial capacitive voltage divider for oscilloscopic recording of nanosecond high voltage pulses

A coaxial capacitance voltage divider with a ratio of 110 and a rise time much less than 2.5 ns was developed for use with a transmission line pulse generator capable of producing 100 kV rectangular pulses of 2 mu s duration. The low voltage arm of the divider is a 3 cm long tube of titania (TiO2) turned out from a cylindrical compact. The compact was made by first pressing titania powder using a suitable binder and then sintering at controlled temperatures. The tube was slipped over the terminating end of the pulse-forming cable to form the divider with the cable capacitance.

A Survey on Cascaded Multilevel Inverters

Cascaded multilevel inverters synthesize a medium-voltage output based on a series connection of power cells which use standard low-voltage component configurations. This characteristic allows one to achieve high-quality output voltages and input currents and also outstanding availability due to their intrinsic component redundancy. Due to these features, the cascaded multilevel inverter has been recognized as an important alternative in the medium-voltage inverter market. This paper presents a survey of different topologies, control strategies and modulation techniques used by these inverters. Regenerative and advanced topologies are also discussed. Applications where the mentioned features play a key role are shown. Finally, future developments are addressed.

Low temperature processing and chacterization of SrBi2Nb2O9 thin films grown by pulsed laser ablation

Ex-situ grown thin films of SrBi2Nb2O9 (SBN) were deposited on platinum substrates using laser ablation technique. A low substrate-temperature-processing route was chosen to avoid any diffusion of bismuth into the Pt electrode. It was observed that the as grown films showed an oriented growth along the 'c'-axis (with zero spontaneous polarization). The as grown films were subsequently annealed to enhance crystallization. Upon annealing, these films transformed into a polycrystalline structure, and exhibited excellent ferroelectric properties. The switching was made to be possible by lowering the thickness without losing the electrically insulating behavior of the films. The hysteresis results showed an excellent square-shaped loop with results (P-r = 4 muC/cm(2) E-c = 90 kV/cm) in good agreement with the earlier reports. The films also exhibited a dielectric constant of 190 and a dissipation factor of 0.02, which showed dispersion at low frequencies. The frequency dispersion was found to obey Jonscher's universal power law relation, and was attributed to the ionic charge hopping process according to earlier reports. The de transport studies indicated an ohmic behavior in the low voltage region, while higher voltages induced a bulk space charge and resulted in non-linear current-voltage dependence.

Multifunctional cryogenic sensors from n-BaTiO3 ceramics having strong negative temperature coefficient of resistance

Donor-doped n-BaTiO3 polycrystalline ceramics show a strong negative temperature coefficient of resistivity below the orthorhombic-rhombohedral phase transition point, from 10(2-3) Omega cm af 190 K to 10(10-13) Omega cm at less than or similar to 50 K, with thermal coefficient of resistance alpha = 20-23% K-1. Stable thermal sensors for low-temperature applications are realized therefrom. The negative temperature coefficient of resistivity region can be modified by substituting isovalent ions in the lattice. Highly nonlinear current-voltage (I-V) curves are observed at low temperatures, with a voltage maximum followed by the negative differential resistance. The I-V curves are sensitive to dissipation so that cryogenic sensors can be fabricated for liquid level control, flow rate monitoring, radiation detection or in-rush voltage limitation.