Design and administration of activity-travel diaries: a case study from Bengaluru city in India

Studies on travel survey instrument design and administration in the context of Indian cities are limited despite the fact that these aspects of travel survey face unique challenges here when compared to the cities in the developed world. Here we report results of a pilot survey conducted for evaluating the performances, alternative diary formats and survey administration techniques in Bengaluru city, India. The study proposes two diary formats. `Diary-1' is in day-planner format and is a variant of the one reported earlier in the literature. `Diary-2' is derived as a combination of `Diary-1' and the trip-based diaries widely applied in Indian cities. `Face-to-face', and `drop-off and pick-up' methods of survey administration are considered for retrieving the activity-travel information of individuals. Evidence appears to be strong that diary-2 is preferable to diary-1 for collecting the travel details of individuals. The comparison of the retrieval methods suggests that the face-to-face method of instrument administration is superior to the drop-off and pick-up method in terms of higher response rates and minimum recording errors.

Design and characterization of in-plane MEMS yaw rate sensor

In this paper, we present the design and characterization of a vibratory yaw rate MEMS sensor that uses in-plane motion for both actuation and sensing. The design criterion for the rate sensor is based on a high sensitivity and low bandwidth. The required sensitivity of the yawrate sensor is attained by using the inplane motion in which the dominant damping mechanism is the fluid loss due to slide film damping i.e. two-three orders of magnitude less than the squeeze-film damping in other rate sensors with out-of-plane motion. The low bandwidth is achieved by matching the drive and the sense mode frequencies. Based on these factors, the yaw rate sensor is designed and finally realized using surface micromachining. The inplane motion of the sensor is experimentally characterized to determine the sense and the drive mode frequencies, and corresponding damping ratios. It is found that the experimental results match well with the numerical and the analytical models with less than 5% error in frequencies measurements. The measured quality factor of the sensor is approximately 467, which is two orders of magnitude higher than that for a similar rate sensor with out-of-plane sense direction.

Design and analysis of rate aware ad hoc 802.11 networks

802.11 WLANs are characterized by high bit error rate and frequent changes in network topology. The key feature that distinguishes WLANs from wired networks is the multi-rate transmission capability, which helps to accommodate a wide range of channel conditions. This has a significant impact on higher layers such as routing and transport levels. While many WLAN products provide rate control at the hardware level to adapt to the channel conditions, some chipsets like Atheros do not have support for automatic rate control. We first present a design and implementation of an FER-based automatic rate control state machine, which utilizes the statistics available at the device driver to find the optimal rate. The results show that the proposed rate switching mechanism adapts quite fast to the channel conditions. The hop count metric used by current routing protocols has proven itself for single rate networks. But it fails to take into account other important factors in a multi-rate network environment. We propose transmission time as a better path quality metric to guide routing decisions. It incorporates the effects of contention for the channel, the air time to send the data and the asymmetry of links. In this paper, we present a new design for a multi-rate mechanism as well as a new routing metric that is responsive to the rate. We address the issues involved in using transmission time as a metric and presents a comparison of the performance of different metrics for dynamic routing.

Design and fabrication of an automated temperature programmed reaction system to evaluate 3-way catalysts Ce1-x-y(La/Y)(x)PtyO2-delta

A completely automated temperature-programmed reaction (TPR) system for carrying out gas-solid catalytic reactions under atmospheric flow conditions is fabricated to study CO and hydrocarbon oxidation, and NO reduction. The system consists of an all-stainless steel UHV system, quadrupole mass spectrometer SX200 (VG Scientific), a tubular furnace and micro-reactor, a temperature controller, a versatile gas handling system, and a data acquisition and analysis system. The performance of the system has been tested under standard experimental conditions for CO oxidation over well-characterized Ce1-x-y(La/Y)(y)O2-delta catalysts. Testing of 3-way catalysis with CO, NO and C2H2 to convert to CO2, N-2 and H2O is done with this catalyst which shows complete removal of pollutants below 325 degrees C. Fixed oxide-ion defects in Pt substituted Ce1-y(La/Y)(y)O2-y/2 show higher catalytic activity than Pt ion-substituted CeO2

Design and fabrication of an automated temperature programmed reaction system to evaluate 3-way catalysts Ce1-x-y(La/Y)(x)PtyO2-delta

A completely automated temperature-programmed reaction (TPR) system for carrying out gas-solid catalytic reactions under atmospheric flow conditions is fabricated to study CO and hydrocarbon oxidation, and NO reduction. The system consists of an all-stainless steel UHV system, quadrupole mass spectrometer SX200 (VG Scientific), a tubular furnace and micro-reactor, a temperature controller, a versatile gas handling system, and a data acquisition and analysis system. The performance of the system has been tested under standard experimental conditions for CO oxidation over well-characterized Ce1-x-y(La/Y)(y)O2-delta catalysts. Testing of 3-way catalysis with CO, NO and C2H2 to convert to CO2, N-2 and H2O is done with this catalyst which shows complete removal of pollutants below 325 degrees C. Fixed oxide-ion defects in Pt substituted Ce1-y(La/Y)(y)O2-y/2 show higher catalytic activity than Pt ion-substituted CeO2.

Design and implementation of a PC-based FPGA tester

A new range of programmable logic devices are revolutionizing the way complex digital hardware is designed and built all over the world. Being able to test these devices in order to validate and dynamically improve on the design is crucial. This paper describes a low-cost FPGA tester that can test SRAM based FPGAs in the laboratory.

Design and realization of high-performance wave-pipelined 8×8 b multiplier in CMOS technology

Wave pipelining is a design technique for increasing the throughput of a digital circuit or system without introducing pipelining registers between adjacent combinational logic blocks in the circuit/system. However, this requires balancing of the delays along all the paths from the input to the output which comes the way of its implementation. Static CMOS is inherently susceptible to delay variation with input data, and hence, receives a low priority for wave pipelined digital design. On the other hand, ECL and CML, which are amenable to wave pipelining, lack the compactness and low power attributes of CMOS. In this paper we attempt to exploit wave pipelining in CMOS technology. We use a single generic building block in Normal Process Complementary Pass Transistor Logic (NPCPL), modeled after CPL, to achieve equal delay along all the propagation paths in the logic structure. An 8×8 b multiplier is designed using this logic in a 0.8 ?m technology. The carry-save multiplier architecture is modified suitably to support wave pipelining, viz., the logic depth of all the paths are made identical. The 1 mm×0.6 mm multiplier core supports a throughput of 400 MHz and dissipates a total power of 0.6 W. We develop simple enhancements to the NPCPL building blocks that allow the multiplier to sustain throughputs in excess of 600 MHz. The methodology can be extended to introduce wave pipelining in other circuits as well

Polymer microfabrication by scanning based microstereolithography: Optical design and material functionality

Several research groups have attempted to optimize photopolymerization parameters to increase the throughput of scanning based microstereolithography (MSL) systems through modified beam scanning techniques. Efforts in reducing the curing line width have been implemented through high numerical aperture (NA) optical setups. However, the intensity contour symmetry and the depth of field of focus have led to grossly non-vertical and non-uniform curing profiles. This work tries to review the photopolymerization process in a scanning based MSL system from the aspect of material functionality and optical design. The focus has been to exploit the rich potential of photoreactor scanning system in achieving desired fabrication modalities (minimum curing width, uniform depth profile, and vertical curing profile) even with a reduced NA optical setup and a single movable stage. The present study tries to manipulate to its advantage the effect of optimized lower c] (photoinitiator (PI) concentration) in reducing the minimum curing width to similar to 10-20 mu m even with a higher spot size (similar to 21.36 mu m) through a judiciously chosen ``monomer-PI'' system. Optimization on grounds of increasing E-max (maximum laser exposure energy at surface) by optimizing the scan rate provides enough time for the monomer or resin to get cured across the entire resist thickness (surface to substrate similar to 10-100 mu m), leading to uniform depth profiles along the entire scan lengths. (C) 2012 American Institute of Physics. http://dx.doi.org/10.1063/1.4750975]

Exponential compact higher order scheme and their stability analysis for unsteady convection-diffusion equations

Exponential compact higher-order schemes have been developed for unsteady convection-diffusion equation (CDE). One of the developed scheme is sixth-order accurate which is conditionally stable for the Peclet number 0 <= Pe <= 2.8 and the other is fourth-order accurate which is unconditionally stable. Schemes for two-dimensional (2D) problems are made to use alternate direction implicit (ADI) algorithm. Example problems are solved and the numerical solutions are compared with the analytical solutions for each case.