Cracks emanating from pin-loaded lugs

Pin-loaded lugs were analysed in the presence of cracks emanating from circular holes. The analysis presents a unified treatment of interference, push or clearance fit pins. Both metallic (isotropic) and composite (orthotropic) plates were dealt with. The finite element model used special singular six-noded quadrilateral elements at the crack tip. The non-linear load contact behaviour at the pin-hole interface was dealt with by an inverse technique. A modified crack closure integral (MCCI) technique was used to evaluate the strain energy release rates (SERRs) and stress intensity factors (SIFs) at the crack tips. Numerical results are presented showing the non-linear variation of SIF with applied stress, and the influence of the amount of interference or clearance and the interfacial friction on SIF.

Part II: A Fully Integrated RF PA in 28-nm CMOS With Device Design for Optimized Performance and ESD Robustness

In this paper, we report drain-extended MOS device design guidelines for the RF power amplifier (RF PA) applications. A complete RF PA circuit in a 28-nm CMOS technology node with the matching and biasing network is used as a test vehicle to validate the RF performance improvement by a systematic device design. A complete RF PA with 0.16-W/mm power density is reported experimentally. By simultaneous improvement of device-circuit performance, 45% improvement in the circuit RF power gain, 25% improvement in the power-added efficiency at 1-GHz frequency, and 5x improvement in the electrostatic discharge robustness are reported experimentally.