Threshold voltage model for accumulation mode polycrystalline SOI MOSFETs and comparisons with experimental results

In this paper, a simple but accurate semi analytical charge sheet model is presented for threshold voltage of accumulation mode polycrystalline silicon on insulator (PSOI) MOSFETs. In this model, we define the threshold voltage (V-T) of the polysilicon accumulation mode MOSFET as the gate voltage required to raise the surface potential (phi(s)) to a value phi(sT) necessary to overcome the charge trapping in the grain boundary and to create channel accumulation charge that is equal to the channel accumulation charge available in the case of single crystal silicon accumulation mode MOSFET at that phi(sT). The correctness of the model is demonstrated by comparing the theoretically estimated values of threshold voltage with the experimentally measured threshold voltages on the accumulation mode PSOI MOSFETs fabricated in the laboratory using LPCVD polysilicon layers doped with boron to achieve dopant densities in the range 3.3 x 10(-15)-5 x 10(17)/cm(3). Further, it is shown that the threshold voltage values of accumulation mode PSOI MOSFETs predicted by the present model match very closely with the experimental results, better than those obtained with the models previously reported in the literature. (C) 2012 Elsevier B.V. All rights reserved.

SOI strip waveguide microring resonator for homogeneous biosensing

We report the simulation and analytical results obtained for homogenous or bulk sensing of protein on Siliconon- insulator strip waveguide based microring resonator. The radii of the rings considered are 5 μm and 20 μm; the waveguide dimensions are 300 × 300 nm. A gap of (i) 200 nm and (ii) 300 nm exists between the ring and the bus waveguide. The biomaterial is uniformly distributed over a thickness which exceeds the evanescent field penetration depth of 150 nm. The sensitivities of the resonators are 32.5 nm/RIU and 17.5 nm/RIU (RIU - Refractive index unit) respectively.

Effect of FIB milling on MEMS SOI cantilevers

Stress induced by Focused Ion Beam (FIB) milling of cantilevers fabricated on silicon-on-insulator (SOI) wafer has been studied. Milling induces stress gradients ranging from -10MPa/μm to -120MPa/μm, depending on the location of cantilevers from the point of milling. Simulations were done to estimate the stress in the milled cantilevers.

Stress Engineering using Si3N4 for stiction free release of SOI beams

We report on the effect of thin silicon nitride (Si3N4) induced tensile stress on the structural release of 200nm thick SOI beam, in the surface micro-machining process. A thin (20nm / 100nm) LPCVD grown Si3N4 is shown to significantly enhance the yield of released beam in wet release technique. This is especially prominent with increase in beam length, where the beams have higher tendency for stiction. We attribute this yield enhancement to the nitride induced tensile stress, as verified by buckling tendency and resonance frequency data obtained from optical profilometry and laser doppler vibrometry.