219 resultados para few-cycle pulse


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The work reported in this thesis is an attempt to enhance heat transfer in electronic devices with the use of impinging air jets on pin-finned heat sinks. The cooling per-formance of electronic devices has attracted increased attention owing to the demand of compact size, higher power densities and demands on system performance and re-liability. Although the technology of cooling has greatly advanced, the main cause of malfunction of the electronic devices remains overheating. The problem arises due to restriction of space and also due to high heat dissipation rates, which have increased from a fraction of a W/cm2to 100s of W /cm2. Although several researchers have at-tempted to address this at the design stage, unfortunately the speed of invention of cooling mechanism has not kept pace with the ever-increasing requirement of heat re- moval from electronic chips. As a result, efficient cooling of electronic chip remains a challenge in thermal engineering. Heat transfer can be enhanced by several ways like air cooling, liquid cooling, phase change cooling etc. However, in certain applications due to limitations on cost and weight, eg. air borne application, air cooling is imperative. The heat transfer can be increased by two ways. First, increasing the heat transfer coefficient (forced convec- tion), and second, increasing the surface area of heat transfer (finned heat sinks). From previous literature it was established that for a given volumetric air flow rate, jet im-pingement is the best option for enhancing heat transfer coefficient and for a given volume of heat sink material pin-finned heat sinks are the best option because of their high surface area to volume ratio. There are certain applications where very high jet velocities cannot be used because of limitations of noise and presence of delicate components. This process can further be improved by pulsating the jet. A steady jet often stabilizes the boundary layer on the surface to be cooled. Enhancement in the convective heat transfer can be achieved if the boundary layer is broken. Disruptions in the boundary layer can be caused by pulsating the impinging jet, i.e., making the jet unsteady. Besides, the pulsations lead to chaotic mixing, i.e., the fluid particles no more follow well defined streamlines but move unpredictably through the stagnation region. Thus the flow mimics turbulence at low Reynolds number. The pulsation should be done in such a way that the boundary layer can be disturbed periodically and yet adequate coolant is made available. So, that there is not much variation in temperature during one pulse cycle. From previous literature it was found that square waveform is most effective in enhancing heat transfer. In the present study the combined effect of pin-finned heat sink and impinging slot jet, both steady and unsteady, has been investigated for both laminar and turbulent flows. The effect of fin height and height of impingement has been studied. The jets have been pulsated in square waveform to study the effect of frequency and duty cycle. This thesis attempts to increase our understanding of the slot jet impingement on pin-finned heat sinks through numerical investigations. A systematic study is carried out using the finite-volume code FLUENT (Version 6.2) to solve the thermal and flow fields. The standard k-ε model for turbulence equations and two layer zonal model in wall function are used in the problem Pressure-velocity coupling is handled using the SIMPLE algorithm with a staggered grid. The parameters that affect the heat transfer coefficient are: height of the fins, total height of impingement, jet exit Reynolds number, frequency of the jet and duty cycle (percentage time the jet is flowing during one complete cycle of the pulse). From the studies carried out it was found that: a) beyond a certain height of the fin the rate of enhancement of heat transfer becomes very low with further increase in height, b) the heat transfer enhancement is much more sensitive to any changes at low Reynolds number than compared to high Reynolds number, c) for a given total height of impingement the use of fins and pulsated jet, increases the effective heat transfer coefficient by almost 200% for the same average Reynolds number, d) for all the cases it was observed that the optimum frequency of impingement is around 50 − 100 Hz and optimum duty cycle around 25-33.33%, e) in the case of turbulent jets the enhancement in heat transfer due to pulsations is very less compared to the enhancement in case of laminar jets.

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Scan circuit is widely practiced DFT technology. The scan testing procedure consist of state initialization, test application, response capture and observation process. During the state initialization process the scan vectors are shifted into the scan cells and simultaneously the responses captured in last cycle are shifted out. During this shift operation the transitions that arise in the scan cells are propagated to the combinational circuit, which inturn create many more toggling activities in the combinational block and hence increases the dynamic power consumption. The dynamic power consumed during scan shift operation is much more higher than that of normal mode operation.

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Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and lower energy consumption. The memory architecture of the embedded system strongly influences these parameters. Hence the embedded system designer performs a complete memory architecture exploration. This problem is a multi-objective optimization problem and can be tackled as a two-level optimization problem. The outer level explores various memory architecture while the inner level explores placement of data sections (data layout problem) to minimize memory stalls. Further, the designer would be interested in multiple optimal design points to address various market segments. However, tight time-to-market constraints enforces short design cycle time. In this paper we address the multi-level multi-objective memory architecture exploration problem through a combination of Multi-objective Genetic Algorithm (Memory Architecture exploration) and an efficient heuristic data placement algorithm. At the outer level the memory architecture exploration is done by picking memory modules directly from a ASIC memory Library. This helps in performing the memory architecture exploration in a integrated framework, where the memory allocation, memory exploration and data layout works in a tightly coupled way to yield optimal design points with respect to area, power and performance. We experimented our approach for 3 embedded applications and our approach explores several thousand memory architecture for each application, yielding a few hundred optimal design points in a few hours of computation time on a standard desktop.