High-Performance Metal-Insulator-Metal Capacitors Using Europium Oxide as Dielectric

We report the first demonstration of metal-insulator-metal (MIM) capacitors with Eu2O3 dielectric for analog and DRAM applications. The influence of different anneal conditions on the electrical characteristics of the fabricated MIM capacitors is studied. FG anneal results in high capacitance density (7 fF/mu m(2)), whereas oxygen anneal results in low quadratic voltage coefficient of capacitance (VCC) (194 ppm/V-2 at 100 kHz), and argon anneal results in low leakage current density (3.2 x 10(-8) A/cm(2) at -1 V). We correlate these electrical results with the surface chemical states of the films through X-ray photoelectron spectroscopy measurements. In particular, FG anneal and argon anneal result in sub-oxides, which modulate the electrical properties.

Compiler-assisted energy optimization for clustered VLIW processors

Clustered architecture processors are preferred for embedded systems because centralized register file architectures scale poorly in terms of clock rate, chip area, and power consumption. Although clustering helps by improving the clock speed, reducing the energy consumption of the logic, and making the design simpler, it introduces extra overheads by way of inter-cluster communication. This communication happens over long global wires having high load capacitance which leads to delay in execution and significantly high energy consumption. Inter-cluster communication also introduces many short idle cycles, thereby significantly increasing the overall leakage energy consumption in the functional units. The trend towards miniaturization of devices (and associated reduction in threshold voltage) makes energy consumption in interconnects and functional units even worse, and limits the usability of clustered architectures in smaller technologies. However, technological advancements now permit the design of interconnects and functional units with varying performance and power modes. In this paper, we propose scheduling algorithms that aggregate the scheduling slack of instructions and communication slack of data values to exploit the low-power modes of functional units and interconnects. Finally, we present a synergistic combination of these algorithms that simultaneously saves energy in functional units and interconnects to improves the usability of clustered architectures by achieving better overall energy-performance trade-offs. Even with conservative estimates of the contribution of the functional units and interconnects to the overall processor energy consumption, the proposed combined scheme obtains on average 8% and 10% improvement in overall energy-delay product with 3.5% and 2% performance degradation for a 2-clustered and a 4-clustered machine, respectively. We present a detailed experimental evaluation of the proposed schemes. Our test bed uses the Trimaran compiler infrastructure. (C) 2012 Elsevier Inc. All rights reserved.

Analysis of current voltage characteristics of MWIR homojunction photodiodes for uncooled operation

Dark currents n(+)/v/p(+) Hg0.69Cd0.Te-31 mid wave infrared photodiodes were measured at room temperature. The diodes exhibited negative differential resistance at room-temperature, but with increasing leakage currents as a function of reverse bias. The current-voltage characteristics were simulated and fitted by incorporating trap assisted tunneling via traps and Shockley-Read-Hall generation recombination process due to dislocations in the carrier transport equations. The thermal suppression of carriers was simulated by taking energy level of trap (E-t), trap density (N-t) and the doping concentrations of n(+) and v regions as fitting parameters. Values of E-t and N-t were 0.78E(g) and similar to 6-9 x 10(14) cm(-3) respectively for most of the diodes. Variable temperature current voltage measurements on variable area diode array (VADA) structures confirmed the fact that variation in zero bias resistance area product (R(0)A) is related to g-r processes originating from variation in concentration and kind of defects that intersect a junction area. (C) 2012 Elsevier B.V. All rights reserved.

Performance and variability trade-off with gate-to-source/drain overlap length

The impact of gate-to-source/drain overlap length on performance and variability of 65 nm CMOS is presented. The device and circuit variability is investigated as a function of three significant process parameters, namely gate length, gate oxide thickness, and halo dose. The comparison is made with three different values of gate-to-source/drain overlap length namely 5 nm, 0 nm, and -5 nm and at two different leakage currents of 10 nA and 100 nA. The Worst-Case-Analysis approach is used to study the inverter delay fluctuations at the process corners. The drive current of the device for device robustness and stage delay of an inverter for circuit robustness are taken as performance metrics. The design trade-off between performance and variability is demonstrated both at the device level and circuit level. It is shown that larger overlap length leads to better performance, while smaller overlap length results in better variability. Performance trades with variability as overlap length is varied. An optimal value of overlap length of 0 nm is recommended at 65 nm gate length, for a reasonable combination of performance and variability.

Substrate temperature influenced physical properties of silicon MOS devices with TiO2 gate dielectric

DC reactive magnetron sputtering technique was employed for deposition of titanium dioxide (TiO2) films. The films were formed on Corning glass and p-Si (100) substrates by sputtering of titanium target in an oxygen partial pressure of 6x10-2 Pa and at different substrate temperatures in the range 303 673 K. The films formed at 303 K were X-ray amorphous whereas those deposited at substrate temperatures?=?473 K were transformed into polycrystalline nature with anatase phase of TiO2. Fourier transform infrared spectroscopic studies confirmed the presence of characteristic bonding configuration of TiO2. The surface morphology of the films was significantly influenced by the substrate temperature. MOS capacitor with Al/TiO2/p-Si sandwich structure was fabricated and performed currentvoltage and capacitancevoltage characteristics. At an applied gate voltage of 1.5 V, the leakage current density of the device decreased from 1.8?x?10-6 to 5.4?x?10-8 A/cm2 with the increase of substrate temperature from 303 to 673 K. The electrical conduction in the MOS structure was more predominant with Schottky emission and Fowler-Nordheim conduction. The dielectric constant (at 1 MHz) of the films increased from 6 to 20 with increase of substrate temperature. The optical band gap of the films increased from 3.50 to 3.56 eV and refractive index from 2.20 to 2.37 with the increase of substrate temperature from 303 to 673 K. Copyright (c) 2012 John Wiley & Sons, Ltd.

Spirodiazaselenuranes: synthesis, structure and antioxidant activity

In this paper, the synthesis, characterization and glutathione peroxidase and peroxynitrite scavenging activities of a series of stable spirodiazaselenuranes are described. The spiro compounds were synthesized in good yields by oxidative cyclization of diaryl selenides bearing amide moieties. All the selenides and spiro derivatives were characterized by H-1, C-13 and Se-77 NMR spectroscopy, mass spectral techniques and the structures of some of the spirodiazaselenuranes were confirmed by single crystal X-ray crystallography. The structures reveal that the selenium atom occupies the center of a distorted trigonal bipyramid core with two nitrogen atoms occupying the apical positions and two carbon atoms and the selenium lone pair occupying the equatorial positions. Mechanistic investigations indicate that the spirocyclization occurs via the formation of selenoxide intermediates. The new compounds were evaluated for their glutathione peroxidase (GPx) mimetic activity by using H2O2 as a substrate and glutathione (GSH) as a co-substrate. It was found that the substituents attached to the nitrogen atom of the selenazole ring have a significant effect on the GPx activity. While the introduction of electron withdrawing groups such as -Cl, -Br etc. to the phenyl ring decreases the activity, the introduction of electron donating groups such as -OH, -OMe significantly enhances the GPx activity of both diaryl selenides and spirodiazaselenuranes. In addition to GPx activity, the selenides and spiro derivatives were studied for their ability to inhibit peroxynitrite (PN)-mediated nitration of bovine serum albumin (BSA) and oxidation of dihydrorhodamine 123. These studies indicate that the diarylselenides effectively inhibit the PN-mediated nitration and oxidation reactions by reacting with PN to produce the corresponding spirodiazaselenuranes.

Integrated magnetics based multi-port bidirectional DC-DC converter topology for discontinuous-mode operation

A new type of multi-port isolated bidirectional DC-DC converter is proposed in this study. In the proposed converter, transfer of power takes place through addition of magnetomotive forces generated by multiple windings on a common transformer core. This eliminates the need for a centralised storage capacitor to interface all the ports. Hence, the requirement of an additional power transfer stage from the centralised capacitor can also be eliminated. The converter can be used for a multi-input, multi-output (MIMO) system. A pulse width modulation (PWM) strategy for controlling simultaneous power flow in the MIMO converter is also proposed. The proposed PWM scheme works in the discontinuous conduction mode. The leakage inductance can be chosen to aid power transfer. By using the proposed converter topology and PWM scheme, the need to compute power flow equations to determine the magnitude and direction of power flow between ports is alleviated. Instead, a simple controller structure based on average current control can be used to control the power flow. This study discusses the operating phases of the proposed multi-port converter along with its PWM scheme, the design process for each of the ports and finally experimental waveforms that validate the multi-port scheme.

Electrothermal Ageing of Epoxy Nanocomposites

Constant stress accelerated ageing experiments were conducted on unfilled epoxy and epoxy alumina nanocomposites with different filler loadings of 0.1, 1 and 5 wt%. Electrical (6 kV/mm), thermal (60 degrees C) and combined electrothermal (6 kV/mm and 60 degrees C) ageing experiments were performed for a duration of 250 h. The leakage current through the samples were continuously monitored and the variation in the tan delta values with ageing duration was also monitored. It was observed that the increase in the tan delta value with ageing duration was less for the epoxy alumina nanocomposites as compared to the unfilled epoxy. Dielectric spectroscopy measurements were performed on the samples before and after the ageing in the frequency range of 10(-2) to 10(6) Hz. The permittivity and tan delta values were found to increase in the low frequency range. The volume resistivity of unfilled epoxy and epoxy alumina nanocomposites were also measured before and after the ageing. The volume resistivity improved marginally for the thermally aged samples, but reduced for the electrically aged and the electrothermally aged samples. The decrease in the value of volume resistivity was more for the multistress aged unfilled epoxy samples as compared to the multistress aged epoxy alumina nanocomposites. It was also observed that the unfilled epoxy samples having a higher value of tan delta failed first. The time to failure of the samples showed an increasing trend with an increase in the nano filler loading of epoxy alumina nanocomposites.

Effect of Temperature Cycling on Conduction Mechanisms in CdTe Thin Films

CdTe thin films of 500 thickness prepared by thermal evaporation technique were analyzed for leakage current and conduction mechanisms. Metal-insulator-metal (MIM) capacitors were fabricated using these films as a dielectric. These films have many possible applications, such as passivation for infrared diodes that operate at low temperatures (80 K). Direct-current (DC) current-voltage (I-V) and capacitance-voltage (C-V) measurements were performed on these films. Furthermore, the films were subjected to thermal cycling from 300 K to 80 K and back to 300 K. Typical minimum leakage currents near zero bias at room temperature varied between 0.9 nA and 0.1 mu A, while low-temperature leakage currents were in the range of 9.5 pA to 0.5 nA, corresponding to resistivity values on the order of 10(8) a''broken vertical bar-cm and 10(10) a''broken vertical bar-cm, respectively. Well-known conduction mechanisms from the literature were utilized for fitting of measured I-V data. Our analysis indicates that the conduction mechanism in general is Ohmic for low fields < 5 x 10(4) V cm(-1), while the conduction mechanism for fields > 6 x 10(4) V cm(-1) is modified Poole-Frenkel (MPF) and Fowler-Nordheim (FN) tunneling at room temperature. At 80 K, Schottky-type conduction dominates. A significant observation is that the film did not show any appreciable degradation in leakage current characteristics due to the thermal cycling.

Adaptive power optimization of on-chip SNUCA cache on tiled chip multicore architecture using remap policy

Advances in technology have increased the number of cores and size of caches present on chip multicore platforms(CMPs). As a result, leakage power consumption of on-chip caches has already become a major power consuming component of the memory subsystem. We propose to reduce leakage power consumption in static nonuniform cache architecture(SNUCA) on a tiled CMP by dynamically varying the number of cache slices used and switching off unused cache slices. A cache slice in a tile includes all cache banks present in that tile. Switched-off cache slices are remapped considering the communication costs to reduce cache usage with minimal impact on execution time. This saves leakage power consumption in switched-off L2 cache slices. On an average, there map policy achieves 41% and 49% higher EDP savings compared to static and dynamic NUCA (DNUCA) cache policies on a scalable tiled CMP, respectively.

Performance and reliability of Gd2O3 and stacked Gd2O3-Eu2O3 metal-insulator-metal capacitors

Gd2O3-based metal-insulator-metal capacitors have been characterized with single layer (Gd2O3) and bilayer (Gd2O3/Eu2O3 and Eu2O3/Gd2O3) stacks for analog and DRAM applications. Although single layer Gd2O3 capacitors provide highest capacitance density (15 fF/mu m(2)), they suffer from high leakage current density, poor capacitance density-voltage linearity, and reliability. The stacked dielectrics help to reduce leakage current density (1.2x10(-5) A/cm(2) and 2.7 x 10(-5) A/cm(2) for Gd2O3/Eu2O3 and Eu2O3/Gd2O3, respectively, at -1 V), improve quadratic voltage coefficient of capacitance (331 ppm/V-2 and 374 ppm/V-2 for Gd2O3/Eu2O3 and Eu2O3/Gd2O3, respectively, at 1 MHz), and improve reliability, with a marginal reduction in capacitance density. This is attributed to lower trap heights as determined from Poole-Frenkel conduction mechanism, and lower defect density as determined from electrode polarization model.

Structural, electrical and dielectric properties of sputtered TiO2 films for Al/TiO2/Si capacitors

Metal-oxide semiconductor capacitors based on titanium dioxide (TiO2) gate dielectrics were prepared by RF magnetron sputtering technique. The deposited films were post-annealed at temperatures in the range 773-1173 K in air for 1 hour. The effect of annealing temperature on the structural properties of TiO2 films was investigated by X-ray diffraction and Raman spectroscopy, the surface morphology was studied by atomic force microscopy (AFM) and the electrical properties of Al/TiO2/p-Si structure were measured recording capacitance-voltage and current-voltage characteristics. The as-deposited films and the films annealed at temperatures lower than 773 K formed in the anatase phase, while those annealed at temperatures higher than 973 K were made of mixtures of the rutile and anatase phases. FTIR analysis revealed that, in the case of films annealed at 1173 K, an interfacial layer had formed, thereby reducing the dielectric constant. The dielectric constant of the as-deposited films was 14 and increased from 25 to 50 with increases in the annealing temperature from 773 to 973 K. The leakage current density of as-deposited films was 1.7 x 10(-5) and decreased from 4.7 X 10(-6) to 3.5 x 10(-9) A/cm(2) with increases in the annealing temperature from 773 to 1173 K. The electrical conduction in the Al/TiO2/p-Si structures was studied on the basis of the plots of Schottky emission, Poole-Frenkel emission and Fowler-Nordheim tunnelling. The effect of structural changes on the current-voltage and capacitance-voltage characteristics of Al/TiO2/p-Si capacitors was also discussed.

Cognitive radio implementation for a frequency hopping primary signal

Frequency hopping communications, used in the military present significant opportunities for spectrum reuse via the cognitive radio technology. We propose a MAC which incorporates hop instant identification, and supports network discovery and formation, QOS Scheduling and secondary communications. The spectrum sensing algorithm is optimized to deal with the problem of spectral leakage. The algorithms are implemented in a SDR platform based test bed and measurement results are presented.

MECHANISM OF CELL LYSIS IN MICROFLUIDIC CHANNEL WITH INTEGRATED NANOCOMPOSITE ELECTRODES

This paper reports on the characterization of an integrated micro-fluidic platform for controlled electrical lysis of biological cells and subsequent extraction of intracellular biomolecules. The proposed methodology is capable of high throughput electrical cell lysis facilitated by nano-composite coated electrodes. The nano-composites are synthesized using Carbon Nanotube and ZnO nanorod dispersion in polymer. Bacterial cells are used to demonstrate the lysis performance of these nanocomposite electrodes. Investigation of electrical lysis in the microchannel is carried out under different parameters, one with continuous DC application and the other under DC biased AC electric field. Lysis in DC field is dependent on optimal field strength and governed by the cell type. By introducing the AC electrical field, the electrokinetics is controlled to prevent cell clogging in the micro-channel and ensure uniform cell dispersion and lysis. Lysis mechanism is analyzed with time-resolved fluorescence imaging which reveal the time scale of electrical lysis and explain the dynamic behavior of GFP-expressing E. coli cells under the electric field induced by nanocomposite electrodes. The DNA and protein samples extracted after lysis are compared with those obtained from a conventional chemical lysis method by using a UV-Visible spectroscopy and fluorimetry. The paper also focuses on the mechanistic understanding of the nano-composite coating material and the film thickness on the leakage charge densities which lead to differential lysis efficiency.

Post-deposition annealing influenced structural and electrical properties of Al/TiO2/Si gate capacitors

Titanium dioxide (TiO2) thin films are deposited on unheated p-Si (100) and quartz substrates by employing DC reactive magnetron sputtering technique. The effect of post-deposition annealing in air at temperatures in the range 673-973 K on the structural, electrical, and dielectric properties of the films was investigated. The chemical composition of the TiO2 films was analyzed with X-ray photoelectron spectroscopy. The surface morphology of the films was studied by atomic force microscope. The optical band gap of the as-deposited film was 3.50 eV, and it increased to 3.55 eV with the increase in annealing temperature to 773 K. The films annealed at higher temperature of 973 K showed the optical band gap of 3.43 eV. Thin film capacitors were fabricated with the MOS configuration of Al/TiO2/p-Si. The leakage current density of the as-deposited films was 1.2 x 10(-6) A/cm(2), and it decreased to 5.9 x 10(-9) A/cm(2) with the increase in annealing temperature to 973 K. These films showed high dielectric constant value of 36. (C) 2013 Elsevier Ltd. All rights reserved.