154 resultados para Electric circuit


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Molecular wires of charge transfer molecules were formed by co-evaporating the 7 7 8 8-Tetracyanoquinodimethane [TCNQ] (acceptor) and Tetrathiafulvalene [TTF] (donor) molecules across prefabricated metal electrodes. Molecular wires of TTF TCNQ were also formed by evaporating single complex of TTF:TCNQ across prefabricated metal electrodes The prefabricated metal electrodes were made using electron beam lithography on SiO2 and glass cover slip substrates. Even though TTF: TCNQ wires grown from both co-evaporation and evaporation techniques show semiconductor like behavior in temperature dependence of resistance they show different activation energies due the difference in stoichiometry of TTF and TCNQ.

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Load commutated inverter (LCI)-fed wound field synchronous motor drives are used for medium-voltage high-power drive applications. This drive suffers from drawbacks such as complex starting procedure, sixth harmonic torque pulsations, quasi square wave motor current, notches in the terminal voltages, etc. In this paper, a hybrid converter circuit, consisting of an LCI and a voltage source inverter (VSI), is proposed, which can be a universal high-power converter solution for wound field synchronous motor drives. The proposed circuit, with the addition of a current-controlled VSI, overcomes nearly all of the shortcomings present in the conventional LCI-based system besides providing many additional advantages. In the proposed drive, the motor voltage and current are always sinusoidal even with the LCI switching at the fundamental frequency. The performance of the drive is demonstrated with detailed experimental waveforms from a 15.8-hp salient pole wound field synchronous machine. Finally, a brief description of the control scheme used for the proposed circuit is given.

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Transmission of bulk power at high voltages over very long distances has become very imperative. At present, throughout the globe, this task has been mostly performed by overhead transmission lines. The dual task of mechanically supporting and electrically isolating the live phase conductors from the support tower is performed by string insulators. Whether in clean condition or under polluted conditions, the electrical stress distribution along the insulators governs the possible flashover, which is quite detrimental to the system. However, a reliable data on stress distribution in commonly employed string insulators are rather scarce. Considering this, the present work has made an attempt to study accurately, the field distribution in 220 kV strings for six different types of porcelain/ceramic insulators (Normal and Antifog discs) used for high voltage transmission. The surface charge simulation method is employed for the required field computation. Voltage and electric stress distribution is deduced and compared across different types of discs. A comparison on normalised surface resistance, which is an indicator for the stress concentration under polluted condition, is also attempted.

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The vacuum interrupter is extensively employed in the medium voltage switchgear for the interruption of the short-circuit current. The voltage across the arc during current interruption is termed as the arc voltage. The nature and magnitude of this arc voltage is indicative of the performance of the contacts and the vacuum interrupter as a whole. Also, the arc voltage depends on the parameters like the magnitude of short-circuit current, the arcing time, the point of opening of the contacts, the geometry and area of the contacts and the type of magnetic field. This paper investigates the dependency of the arc voltage on some of these parameters. The paper also discusses the usefulness of the arc voltage in diagnosing the performance of the contacts.

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Transfer function coefficients (TFC) are widely used to test linear analog circuits for parametric and catastrophic faults. This paper presents closed form expressions for an upper bound on the defect level (DL) and a lower bound on fault coverage (FC) achievable in TFC based test method. The computed bounds have been tested and validated on several benchmark circuits. Further, application of these bounds to scalable RC ladder networks reveal a number of interesting characteristics. The approach adopted here is general and can be extended to find bounds of DL and FC of other parametric test methods for linear and non-linear circuits.

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In this talk I discuss some aspects of the study of electric dipole moments (EDMs) of the fermions, in the context of R-parity violating (\rpv) Supersymmetry (SUSY). I will start with a brief general discussion of how dipole moments, in general, serve as a probe of physics beyond the Standard Model (SM) and an even briefer summary of \rpv SUSY. I will follow by discussing a general method of analysis for obtaining the leading fermion mass dependence of the dipole moments and present its application to \rpv SUSY case. Then I will summarise the constraints that the analysis of $e,n$ and $Hg$ EDMs provide for the case of trilinear \rpv SUSY couplings and make a few comments on the case of bilinear \rpv, where the general method of analysis proposed by us does not work.

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Nuclear electro-magnetic pulse (NEMP) simulators which are used in the simulation of transient electromagnetic fields due to a high altitude nuclear detonation are generally excited with a double exponential high voltage pulse. This results in a current distribution on the wires of the simulator and hence a transient electric field in the working volume of the simulator where the test object is kept. It is found that for the simulator under study, the current distribution is non-uniform and so is the field distribution along the width of the simulator in the working volume. To make the current distribution uniform, several methods have been suggested and the results of these methods are analyzed and suitable conclusions are arrived at from those results.

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The effect of variation in the switching instant of the output switch of the pulser circuit used in energizing an NEMP simulator on the voltage fed to the simulator and hence the electric field within the working volume of the simulator has been studied. Depending upon the instant at which the output switch closes, the amplitude and the wave shape of the voltage that is fed to the illuminator varies. This wave shape of the output voltage from the pulser circuit determines the shape and characteristics of the electric field within the working volume of the simulator. To study the effect of variation in the switching instant on the vertical electric field within the working volume, the vertical electric field has been computed in time and frequency domains. For certain switching instants, the electric field shows a sharp reduction in its amplitude after the peak which is called the notch. The presence of notch results in the test object not getting illuminated with all the frequencies of interest. The notch has been successfully reduced by suitably modifying the pulser circuit.

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In the recent years, there has been a trend to run metallic pipelines carrying petroleum products and high voltage AC power lines parallel to each other in a relatively narrow strip of land. Due to this sharing of the right-of-way, verhead AC power line electric field may induce voltages on the metallic pipelines running in close vicinity leading to serious adverse effects. In this paper, the induced voltages on metallic pipelines running in close vicinity of high voltage power transmission lines have been computed. Before computing the induced voltages, an optimum configuration of the phase conductors based on the lowest conductor surface gradient and field under transmission line has been arrived at. This paper reports the conductor surface field gradients calculated for the various configurations. Also the electric fields under transmission line, for single circuit and double circuit (various phase arrangements) have been analyzed. Based on the above results, an optimum configuration giving the lowest field under the power line as well as the lowest conductor surface gradient has been arrived at and for this configuration, induced voltage on the pipeline has been computed using the Charge Simulation Method (CSM). For comparison, induced voltages on the pipeline has been computed for the various other phase configurations also.

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Titanium dioxide (TiO(2)) films have been deposited on glass and p-silicon (1 0 0) substrates by DC magnetron sputtering technique to investigate their structural, electrical and optical properties. The surface composition of the TiO(2) films has been analyzed by X-ray photoelectron spectroscopy. The TiO(2) films formed on unbiased substrates were amorphous. Application of negative bias voltage to the substrate transformed the amorphous TiO(2) into polycrystalline as confirmed by Raman spectroscopic studies. Thin film capacitors with configuration of Al/TiO(2)/p-Si have been fabricated. The leakage current density of unbiased films was 1 x10(-6) A/cm(2) at a gate bias voltage of 1.5 V and it was decreased to 1.41 x 10(-7) A/cm(2) with the increase of substrate bias voltage to -150 V owing to the increase in thickness of interfacial layer of SiO(2). Dielectric properties and AC electrical conductivity of the films were studied at various frequencies for unbiased and biased at -150 V. The capacitance at 1 MHz for unbiased films was 2.42 x 10(-10) F and it increased to 5.8 x 10(-10) F in the films formed at substrate bias voltage of -150 V. Dielectric constant of TiO(2) films were calculated from capacitance-voltage measurements at 1 MHz frequency. The dielectric constant of unbiased films was 6.2 while those formed at -150 V it increased to 19. The optical band gap of the films decreased from 3.50 to 3.42 eV with the increase of substrate bias voltage from 0 to -150 V. (C) 2011 Elsevier B. V. All rights reserved.

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A novel methodology for modeling the effects of process variations on circuit delay performance is proposed by relating the variations in process parameters to variations in delay metric of a complex digital circuit. The delay of a 2-input NAND gate with 65nm gate length transistors is extensively characterized by mixed-mode simulations which is then used as a library element. The variation in saturation current Ionat the device level, and the variation in rising/falling edge stage delay for the NAND gate at the circuit level, are taken as performance metrics. A 4-bit x 4-bit Wallace tree multiplier circuit is used as a representative combinational circuit to demonstrate the proposed methodology. The variation in the multiplier delay is characterized, to obtain delay distributions, by an extensive Monte Carlo analysis. An analytical model based on CV/I metric is proposed, to extend this methodology for a generic technology library with a variety of library elements.

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An extension to a formal verification approach of hybrid systems is proposed to verify analog and mixed signal (AMS) designs. AMS designs can be formally modeled as hybrid systems and therefore lend themselves to the formal analysis and verification techniques applied to hybrid systems. The proposed approach employs simulation traces obtained from an actual design implementation of AMS circuit blocks (for example, in the form of SPICE netlists) to carry out formal analysis and verification. This enables the same platform used for formally validating an abstract model of an AMS design, to be also used for validating its different refinements and design implementation; thereby, providing a simple route to formal verification at different levels of implementation. The feasibility of the proposed approach is demonstrated with a case study based on a tunnel diode oscillator. Since the device characteristic of a tunnel diode is highly non-linear with a negative resistance region, dynamic behavior of circuits in which it is employed as an element is difficult to model, analyze and verify within a general hybrid system formal verification tool. In the case study presented the formal model and the proposed computational techniques have been incorporated into CheckMate, a formal verification tool based on MATLAB and Simulink-Stateflow Framework from MathWorks.

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A set of formulas is derived from general circuit constants which facilitates formation of the impedance matrix of a power system by the bus-impedance method. The errors associated with the lumpedparameter representation of a transmission line are thereby eliminated. The formulas are valid for short lines also, if the relevant general circuit constants are employed. The mutual impedance between the added line and the existing system is not considered, but the approach suggested can well be extended to it.