Influence of curvature on the device physics of thin film transistors on flexible substrates

Thin film transistors (TFTs) on elastomers promise flexible electronics with stretching and bending. Recently, there have been several experimental studies reporting the behavior of TFTs under bending and buckling. In the presence of stress, the insulator capacitance is influenced due to two reasons. The first is the variation in insulator thickness depending on the Poisson ratio and strain. The second is the geometric influence of the curvature of the insulator-semiconductor interface during bending or buckling. This paper models the role of curvature on TFT performance and brings to light an elegant result wherein the TFT characteristics is dependent on the area under the capacitance-distance curve. The paper compares models with simulations and explains several experimental findings reported in literature. (C) 2014 AIP Publishing LLC.

Biocompatible and Antibacterial SnO2 Nanowire Films Synthesized by E-Beam Evaporation Method

In this work, the biocompatibility and antibacterial activities of novel SnO2 nanowire coatings prepared by electron-beam (E-Beam) evaporation process at low temperatures were studied. The nanowire coatings were characterized by scanning electron microscopy (SEM), energy dispersive X-ray analysis (EDX), and X-ray diffraction (XRD) methods. The results of in vitro cytotoxicity and cell proliferation assays suggested that the SnO2 nanowire coatings were nontoxic and promoted the proliferation of C2C12 and L929 cells (> 90% viability). Cellular activities, cell adhesion, and lactate dehydrogenase activities were consistent with the superior biocompatibility of the nanowire materials. Notably, the nanowire coating showed potent antibacterial activity against six different bacterial strains. The antibacterial activity of the SnO2 material was attributed to the photocatalytic nature of SnO2. The antibacterial activity and biocompatibility of the newly developed SnO2 nanowire coatings may enable their use as coating materials for biomedical implants.

An Advanced Gate Driver for Insulated Gate Bipolar Transistors to Eliminate Dead-time Induced Distortions in Inverter Output

Dead-time is introduced between the gating signals to the top and bottom switches in a voltage source inverter (VSI) leg, to prevent shoot through fault due to the finite turn-off times of IGBTs. The dead-time results in a delay when the incoming device is an IGBT, resulting in error voltage pulses in the inverter output voltage. This paper presents the design, fabrication and testing of an advanced gate driver, which eliminates dead-time and consequent output distortion. Here, the gating pulses are generated such that the incoming IGBT transition is not delayed and shoot-through is also prevented. The various logic units of the driver card and fault tolerance of the driver are verified through extensive tests on different topologies such as chopper, half-bridge and full-bridge inverter, and also at different conditions of load. Experimental results demonstrate the improvement in the load current waveform quality with the proposed circuit, on account of elimination of dead-time.

SnO2 nanowire anchored graphene nanosheet matrix for the superior performance of Li-ion thin film battery anode

All solid state batteries are essential candidate for miniaturizing the portable electronics devices. Thin film batteries are constructed by layer by layer deposition of electrode materials by physical vapour deposition method. We propose a promising novel method and unique architecture, in which highly porous graphene sheet embedded with SnO2 nanowire could be employed as the anode electrode in lithium ion thin film battery. The vertically standing graphene flakes were synthesized by microwave plasma CVD and SnO2 nanowires based on a vapour-liquid-solid (VLS) mechanism via thermal evaporation at low synthesis temperature (620 degrees C). The graphene sheet/SnO2 nanowire composite electrode demonstrated stable cycling behaviours and delivered a initial high specific discharge capacity of 1335 mAh g(-1) and 900 mAh g(-1) after the 50th cycle. Furthermore, the SnO2 nanowire electrode displayed superior rate capabilities with various current densities.

Temperature dependent current-voltage characteristics of zinc oxide nanowire/polypyrrole nanocomposite

Temperature dependent current-voltage (I-V) measurements of electrochemically prepared zinc oxide nanowire/polypyrrole (ZnONW/PPy) nanocomposite yielded non-linear I-V characteristics at temperatures between 300 and 4.5 K. The low-field conductance (G) of the ZnONW/PPy film exhibits pronounced temperature dependence with room temperature conductance (G(300K)) similar to 10(-3) S and a conductance ratio (G(300)K/G(4.5K)) of similar to 10(4), indicating dominance of significant temperature dependent charge transport processes. The conduction mechanism of the film is satisfactorily understood by extended fluctuation induced tunneling (FIT) model as the non-linear I-V characteristics fit fairly well to the extended FIT model. Further, the temperature dependence of G(o) obtained from fitting followed Sheng's model also. (C) 2014 AIP Publishing LLC.

Si nanowire growth on sapphire: Classical incubation, reverse reaction, and steady state supersaturation

Si nanowire growth on sapphire substrates by the vapor-liquid-solid (VLS) method using Au catalyst particles has been studied. Sapphire was chosen as the substrate to ensure that the vapor phase is the only source of Si. Three hitherto unreported observations are described. First, an incubation period of 120-480 s, which is shown to be the incubation period as defined in classical nucleation theory, is reported. This incubation period permits the determination of a desolvation energy of Si from Au-Si alloys of 15 kT. Two, transmission electron microscopy studies of incubation, point to Si loss by reverse reaction as an important part of the mechanism of Si nanowire growth by VLS. Three, calculations using these physico-chemical parameters determined from incubation and measured steady state growth rates of Si nanowires show that wire growth happens from a supersaturated catalyst droplet. (C) 2015 AIP Publishing LLC.

Experimental Investigation on Switching Characteristics of High-Current Insulated Gate Bipolar Transistors at Low Currents

Insulated gate bipolar transistors (IGBTs) are used in high-power voltage-source converters rated up to hundreds of kilowatts or even a few megawatts. Knowledge of device switching characteristics is required for reliable design and operation of the converters. Switching characteristics are studied widely at high current levels, and corresponding data are available in datasheets. But the devices in a converter also switch low currents close to the zero crossings of the line currents. Further, the switching behaviour under these conditions could significantly influence the output waveform quality including zero crossover distortion. Hence, the switching characteristics of high-current IGBTs (300-A and 75-A IGBT modules) at low load current magnitudes are investigated experimentally in this paper. The collector current, gate-emitter voltage and collector-emitter voltage are measured at various low values of current (less than 10% of the device rated current). A specially designed in-house constructed coaxial current transformer (CCT) is used for device current measurement without increasing the loop inductance in the power circuit. Experimental results show that the device voltage rise time increases significantly during turn-off transitions at low currents.

High-Performance Sensors Based on Resistance Fluctuations of Single-Layer-Graphene Transistors

One of the most interesting predicted applications of graphenemonolayer-based devices is as high-quality sensors. In this article, we show, through systematic experiments, a chemical vapor sensor based on the measurement of lowfrequency resistance fluctuations of single-layer-graphene field-effect-transistor devices. The sensor has extremely high sensitivity, very high specificity, high fidelity, and fast response times. The performance of the device using this scheme of measurement (which uses resistance fluctuations as the detection parameter) is more than 2 orders of magnitude better than a detection scheme in which changes in the average value of the resistance is monitored. We propose a number-densityfluctuation-based model to explain the superior characteristics of a noisemeasurement-based detection scheme presented in this article.

Percolative switching in transition metal dichalcogenide field-effect transistors at room temperature

We have addressed the microscopic transport mechanism at the switching or `on-off' transition in transition metal dichalcogenide (TMDC) field-effect transistors (FETs), which has been a controversial topic in TMDC electronics, especially at room temperature. With simultaneous measurement of channel conductivity and its slow time-dependent fluctuation (or noise) in ultrathin WSe2 and MoS2 FETs on insulating SiO2 substrates where noise arises from McWhorter-type carrier number fluctuations, we establish that the switching in conventional backgated TMDC FETs is a classical percolation transition in a medium of inhomogeneous carrier density distribution. From the experimentally observed exponents in the scaling of noise magnitude with conductivity, we observe unambiguous signatures of percolation in a random resistor network, particularly, in WSe2 FETs close to switching, which crosses over to continuum percolation at a higher doping level. We demonstrate a powerful experimental probe to the microscopic nature of near-threshold electrical transport in TMDC FETs, irrespective of the material detail, device geometry, or carrier mobility, which can be extended to other classes of 2D material-based devices as well.

On the Geometrically Dependent Quasi-Saturation and g(m) Reduction in Advanced DeMOS Transistors

This paper reveals an early quasi-saturation (QS) effect attributed to the geometrical parameters in shallow trench isolation-type drain-extended MOS (STI-DeMOS) transistors in advanced CMOS technologies. The quasi-saturation effect leads to serious g(m) reduction in STI-DeMOS. This paper investigates the nonlinear resistive behavior of the drain-extended region and its impact on the particular behavior of the STI-DeMOS transistor. In difference to vertical DMOS or lateral DMOS structures, STI-DeMOS exhibits three distinct regions of the drain extension. A complete understanding of the physics in these regions and their impact on the QS behavior are developed in this paper. An optimization strategy is shown for an improved g(m) device in a state-of-the-art 28-nm CMOS technology node.

Design Optimization of Thin-Film Transistors Based on a Metal-Substrate-Semiconductor Architecture for High DC Voltage Sensing

We discuss the potential application of high dc voltage sensing using thin-film transistors (TFTs) on flexible substrates. High voltage sensing has potential applications for power transmission instrumentation. For this, we consider a gate metal-substrate-semiconductor architecture for TFTs. In this architecture, the flexible substrate not only provides mechanical support but also plays the role of the gate dielectric of the TFT. Hence, the thickness of the substrate needs to be optimized for maximizing transconductance, minimizing mechanical stress, and minimizing gate leakage currents. We discuss this optimization, and develop n-type and p-type organic TFTs using polyvinyldene fluoride as the substrate-gate insulator. Circuits are also realized to achieve level shifting, amplification, and high drain voltage operation.

Stress-induced martensitic phase transformation in Cu-Zr nanowires

A novel stress-induced martensitic phase transformation in an initial < 100 >/{100} B2-CuZr nanowire is reported for the first time in this letter. Such behavior is observed in a nanowire with cross-sectional dimensions of 19.44 x 19.44 angstrom(2) over a temperature range of 100-400 K and at a strain rate of 1 x 10(9) s(-1) using atomistic simulations. Phase transformation from an initial B2 phase to a BCT (Body-Centered-Tetragonal) phase is observed via nucleation and propagation of {100} twinning plane under high strain rate tensile deformation. (C) 2009 Elsevier B.V. All rights reserved.

Novel CMOS Schmitt trigger

A novel CMOS Schmitt trigger using only four MOS transistors is discussed. This circuit, which works on the principle of load-coupled regenerative feedback, can be implemented using conventional CMOS technology with only one extra fabrication step. It can be implemented even more easily in CMOS/SOS (silicon-on-sapphire) integrated circuits. The hysteresis of this Schmitt trigger can be controlled by a proper choice of the transistor geometries.

A Simple Multiple Pulsewidth Modulated AC Choppe

A simple multiple pulsewidth modulated (MPWM) ac chopper using power transistors for 3-ý power control is discussed. 120ý chopping period is used for main transistors so that the circuit can accommodate resistive and lagging or leading power factor loads. Only 1-ý sensing is used for 3-ý control. An alternate economical power and control schemes for 3-ý MPWM ac choppers suitable only for resistive loads is also suggested. The experimental results for 12 choppings per cycle are given.

Resistance Noise in Graphene Based Field Effect Devices

We present a low-frequency electrical noise measurement in graphene based field effect transistors. For single layer graphene (SLG), the resistance fluctuations is governed by the screening of the charge impurities by the mobile charges. However, in case of Bilayer graphene (BLG), the electrical noise is strongly connected to its band structure, and unlike single layer graphene, displays a minimum when the gap between the conduction and valence band is zero. Using double gated BLG devices we have tuned the zero gap and charge neutrality points independently, which offers a versatile mechanism to investigate the low-energy band structure, charge localization and screening properties of bilayer graphene