89 resultados para DIGITAL SIGNATURE


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First systematic spin probe ESR study of water freezing has been conducted using TEMPOL and TEMPO as the probes. The spin probe signature of the water freezing has been described in terms of the collapse of narrow triplet spectrum into a single broad line. This spin probe signature of freezing has been observed at an anomalously low temperature when a milimoler solution of TEMPOL is slowly cooled from room temperature. A systematic observation has revealed a spin probe concentration dependence of these freezing and respective melting points. These results can be explained in terms of localization of spin probe and liquid water,most probably in the interstices of ice grains, in an ice matrix. The lowering of spin probe freezing point, along with the secondary evidences, like spin probe concentration dependence of peak-to-peak width in frozen limit signal, indicates a possible size dependence of these localizations/entrapments with spin probe concentration. A weak concentration dependence of spin probe assisted freezing and melting points, which has been observed for TEMPO in comparison to TEMPOL, indicates different natures of interactions with water of these two probes. This view is also supported by the relaxation behavior of the two probes.

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This letter proposes a simple tuning algorithm for digital deadbeat control based on error correlation. By injecting a square-wave reference input and calculating the correlation of the control error, a gain correction for deadbeat control is obtained. The proposed solution is simple, it requires a short tuning time, and it is suitable for different DC-DC converter topologies. Simulation and experimental results on synchronous buck converters confirm the properties of the proposed tuning algorithm.

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The sonic boom at a large distance from its source consists of a leading shock, a trailing shock and a one parameter family of nonlinear wavefronts in between these shocks. A new ray theoretical method using a shock ray theory and a weakly nonlinear lay theory has been used to obtain the shock fronts and wavefronts respectively, for a maneuvering aerofoil in a homogeneous medium. This method introduces a one parameter family of Cauchy problems to calculate the shock and wave fronts emerging from the surface of the aerofoil. These problems are solved numerically to obtain the leading shock front and the nonlinear wavefronts emerging from the front portion of the aerofoil.

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A generalized power tracking algorithm that minimizes power consumption of digital circuits by dynamic control of supply voltage and the body bias is proposed. A direct power monitoring scheme is proposed that does not need any replica and hence can sense total power consumed by load circuit across process, voltage, and temperature corners. Design details and performance of power monitor and tracking algorithm are examined by a simulation framework developed using UMC 90-nm CMOS triple well process. The proposed algorithm with direct power monitor achieves a power savings of 42.2% for activity of 0.02 and 22.4% for activity of 0.04. Experimental results from test chip fabricated in AMS 350 nm process shows power savings of 46.3% and 65% for load circuit operating in super threshold and near sub-threshold region, respectively. Measured resolution of power monitor is around 0.25 mV and it has a power overhead of 2.2% of die power. Issues with loop convergence and design tradeoff for power monitor are also discussed in this paper.

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We present a technique for irreversible watermarking approach robust to affine transform attacks in camera, biomedical and satellite images stored in the form of monochrome bitmap images. The watermarking approach is based on image normalisation in which both watermark embedding and extraction are carried out with respect to an image normalised to meet a set of predefined moment criteria. The normalisation procedure is invariant to affine transform attacks. The result of watermarking scheme is suitable for public watermarking applications, where the original image is not available for watermark extraction. Here, direct-sequence code division multiple access approach is used to embed multibit text information in DCT and DWT transform domains. The proposed watermarking schemes are robust against various types of attacks such as Gaussian noise, shearing, scaling, rotation, flipping, affine transform, signal processing and JPEG compression. Performance analysis results are measured using image processing metrics.

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A method of precise measurement of on-chip analog voltages in a mostly-digital manner, with minimal overhead, is presented. A pair of clock signals is routed to the node of an analog voltage. This analog voltage controls the delay between this pair of clock signals, which is then measured in an all-digital manner using the technique of sub-sampling. This sub-sampling technique, having measurement time and accuracy trade-off, is well suited for low bandwidth signals. This concept is validated by designing delay cells, using current starved inverters in UMC 130nm CMOS process. Sub-mV accuracy is demonstrated for a measurement time of few seconds.

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Temperature modulated alternating differential scanning calorimetric studies show that Se rich Ge0.15Se0.85−xAgx (0 x 0.20) glasses are microscopically phase separated, containing Ag2Se phases embedded in a Ge0.15Se0.85 backbone. With increasing silver concentration, Ag2Se phase percolates in the Ge–Se matrix, with a well-defined percolation threshold at x = 0.10. A signature of this percolation transition is shown up in the thermal behavior, as the appearance of two exothermic crystallization peaks. Density, molar volume, and microhardness measurements, undertaken in the present study, also strongly support this view of percolation transition. The superionic conduction observed earlier in these glasses at higher silver proportions is likely to be connected with the silver phase percolation.

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In this paper we report a systematic study of low-frequency 1/fα resistance fluctuation in a metal film at different stages of electromigration. The resistance fluctuation (noise) measurement was carried out in presence of a dc electromigration stressing current. We observe that in addition to the increase in the spectral power SV(f), the frequency dependence of the spectral power changes as the electromigration process progresses and the exponent α starts to change from 1 to higher value closer to 1.5. We interpret this change in α as arising due to an additional contribution to the spectral power with a 1/f3/2 component, which starts to contribute as the electromigration process progresses. This additional component SV(f) ∼ 1/f3/2 has been suggested to originate from long range diffusion that would accompany any electromigration process. The experimental observation finds support in a model simulation, where we also find that the enhancement of noise during electromigration stressing is accompanied by a change in spectral power frequency dependence.

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This paper describes the simulation of a control scheme using the principle of field orientation for the control of a voltage source inverter-fed induction motor. The control principle is explained, followed by an algorithm to simulate various components of the system in the digital computer. The dynamic response of the system for the load disturbance and set-point variations have been studied. Also, the results of the simulation showing the behavior of field coordinates for such disturbances are given.

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Power semiconductor devices have finite turn on and turn off delays that may not be perfectly matched. In a leg of a voltage source converter, the simultaneous turn on of one device and the turn off of the complementary device will cause a DC bus shoot through, if the turn off delay is larger than the turn on delay time. To avoid this situation it is common practice to blank the two complementary devices in a leg for a small duration of time while switching, which is called dead time. This paper proposes a logic circuit for digital implementation required to control the complementary devices of a leg independently and at the same time preventing cross conduction of devices in a leg, and while providing accurate and stable dead time. This implementation is based on the concept of finite state machines. This circuit can also block improper PWM pulses to semiconductor switches and filters small pulses notches below a threshold time width as the narrow pulses do not provide any significant contribution to average pole voltage, but leads to increased switching loss. This proposed dead time logic has been implemented in a CPLD and is implemented in a protection and delay card for 3- power converters.

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Ergonomic design of products demands accurate human dimensions-anthropometric data. Manual measurement over live subjects, has several limitations like long time, required presence of subjects for every new measurement, physical contact etc. Hence the data currently available is limited and anthropometric data related to facial features is difficult to obtain. In this paper, we discuss a methodology to automatically detect facial features and landmarks from scanned human head models. Segmentation of face into meaningful patches corresponding to facial features is achieved by Watershed algorithms and Mathematical Morphology tools. Many Important physiognomical landmarks are identified heuristically.

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A generalized power tracking algorithm that minimizes power consumption of digital circuits by dynamic control of supply voltage and the body bias is proposed. A direct power monitoring scheme is proposed that does not need any replica and hence can sense total power consumed by load circuit across process, voltage, and temperature corners. Design details and performance of power monitor and tracking algorithm are examined by a simulation framework developed using UMC 90-nm CMOS triple well process. The proposed algorithm with direct power monitor achieves a power savings of 42.2% for activity of 0.02 and 22.4% for activity of 0.04. Experimental results from test chip fabricated in AMS 350 nm process shows power savings of 46.3% and 65% for load circuit operating in super threshold and near sub-threshold region, respectively. Measured resolution of power monitor is around 0.25 mV and it has a power overhead of 2.2% of die power. Issues with loop convergence and design tradeoff for power monitor are also discussed in this paper.