A Simulation Based Study and Analysis of Double Gate Tunnel FET Performance for Low Stand-By Power Applications

The conventional metal oxide semiconductor field effect transistor (MOSFET)may not be suitable for future low standby power (LSTP) applications due to its high off-state current as the sub-threshold swing is theoretically limited to 60mV/decade. Tunnel field effect transistor (TFET) based on gate controlled band to band tunneling has attracted attention for such applications due to its extremely small sub-threshold swing (much less than 60mV/decade). This paper takes a simulation approach to gain some insight into its electrostatics and the carrier transport mechanism. Using 2D device simulations, a thorough study and analysis of the electrical parameters of the planar double gate TFET is performed. Due to excellent sub-threshold characteristics and a reverse biased structure, it offers orders of magnitude less leakage current compared to the conventional MOSFET. In this work, it is shown that the device can be scaled down to channel lengths as small as 30 nm without affecting its performance. Also, it is observed that the bulk region of the device plays a major role in determining the sub-threshold characteristics of the device and considerable improvement in performance (in terms of ION/IOFF ratio) can be achieved if the thickness of the device is reduced. An ION/IOFF ratio of 2x1012 and a minimum point sub-threshold swing of 22mV/decade is obtained.

A five level inverter scheme with common mode volatge elimination by cascading conventional two level and three level NPC inverters for an induction motor drive

Common-mode voltage generated by the PWM inverter causes shaft voltage, bearing current and ground leakage current in induction motor drive system, resulting in an early motor failure. This paper presents a common-mode elimination scheme for a five-level inverter with reduced power circuit complexity. The proposed scheme is realised by cascading conventional two-level and conventional NPC three-level inverters in conjunction with an open-end winding three-phase induction motor drive and the common-mode voltage (CMV) elimination is achieved by using only switching states that result in zero CMV, for the entire modulation range.

Effect of N/Ga flux ratio on transport behavior of Pt/GaN Schottky diodes

GaN films were grown on c-plane sapphire by plasma-assisted molecular beam epitaxy (PAMBE). The effect of N/Ga flux ratio on structural, morphological, and optical properties was studied. The dislocation density found to increase with increasing the N/Ga ratio. The surface morphology of the films as seen by scanning electron microscopy shows pits on the surface and found that the pit density on the surface increases with N/Ga ratio. The room temperature photoluminescence study reveals the shift in band-edge emission toward the lower energy with increase in N/Ga ratio. This is believed to arise from the reduction in compressive stress in the films as is evidenced by room temperature Raman study. The transport studied on the Pt/GaN Schottky diodes showed a significant increase in leakage current with an increase in N/Ga ratio and was found to be caused by the increase in pit density as well as increase in dislocation density in the GaN films. (C) 2011 American Institute of Physics. [doi:10.1063/1.3634116]

Effect of substrate bias voltage on the structure, electric and dielectric properties of TiO(2) thin films by DC magnetron sputtering

Titanium dioxide (TiO(2)) films have been deposited on glass and p-silicon (1 0 0) substrates by DC magnetron sputtering technique to investigate their structural, electrical and optical properties. The surface composition of the TiO(2) films has been analyzed by X-ray photoelectron spectroscopy. The TiO(2) films formed on unbiased substrates were amorphous. Application of negative bias voltage to the substrate transformed the amorphous TiO(2) into polycrystalline as confirmed by Raman spectroscopic studies. Thin film capacitors with configuration of Al/TiO(2)/p-Si have been fabricated. The leakage current density of unbiased films was 1 x10(-6) A/cm(2) at a gate bias voltage of 1.5 V and it was decreased to 1.41 x 10(-7) A/cm(2) with the increase of substrate bias voltage to -150 V owing to the increase in thickness of interfacial layer of SiO(2). Dielectric properties and AC electrical conductivity of the films were studied at various frequencies for unbiased and biased at -150 V. The capacitance at 1 MHz for unbiased films was 2.42 x 10(-10) F and it increased to 5.8 x 10(-10) F in the films formed at substrate bias voltage of -150 V. Dielectric constant of TiO(2) films were calculated from capacitance-voltage measurements at 1 MHz frequency. The dielectric constant of unbiased films was 6.2 while those formed at -150 V it increased to 19. The optical band gap of the films decreased from 3.50 to 3.42 eV with the increase of substrate bias voltage from 0 to -150 V. (C) 2011 Elsevier B. V. All rights reserved.

Effect of gate-drain/source overlap on the noise in 90 nm N-channel metal oxide semiconductor field effect transistors

In this paper, we have studied the effect of gate-drain/source overlap (LOV) on the drain channel noise and induced gate current noise (SIg) in 90 nm N-channel metal oxide semiconductor field effect transistors using process and device simulations. As the change in overlap affects the gate tunneling leakage current, its effect on shot noise component of SIg has been taken into consideration. It has been shown that “control over LOV” allows us to get better noise performance from the device, i.e., it allows us to reduce noise figure, for a given leakage current constraint. LOV in the range of 0–10 nm is recommended for the 90 nm gate length transistors, in order to get the best performance in radio frequency applications.

Atomic layer deposition of ZrO2 thin films: Study of growth kinetics and dielectric behaviour

Thin films of ZrO2 have been deposited by ALD on Si(100) and SIMOX using two different metalorganic complexes of Zr as precursors. These films are characterized by X-ray diffraction, transmission and scanning electron microscopies, infrared spectroscopy, and electrical measurements. These show that amorphous ZrO2 films of high dielectric quality may be grown on Si(100) starting about 400degreesC. As the growth temperature is raised, the films become crystalline, the phase formed and the microstructure depending on precursor molecular structure. The phase of ZrO2 formed depends also on the relative duration of the precursor and oxygen pulses. XPS and IR spectroscopy show that films grown at low temperatures contain chemically unbound carbon, its extent depending on the precursor. C-V measurements show that films grown on Si(100) have low interface state density, low leakage current, a hysteresis width of only 10-250 mV and a dielectric constant of similar to16-25.

Tracking and Erosion of Silicone Rubber Nanocomposites under DC Voltages of both Polarities

In order to improve the tracking and erosion performance of outdoor polymeric silicone rubber (SR) insulators used in HV power transmission lines, micron sized inorganic fillers are usually added to the base SR matrix. In addition, insulators used in high voltage dc transmission lines are designed to have increased creepage distance to mitigate the tracking and erosion problems. ASTM D2303 standard gives a procedure for finding the tracking and erosion resistance of outdoor polymeric insulator weathershed material samples under laboratory conditions for ac voltages. In this paper, inclined plane (IP) tracking and erosion tests similar to ASTM D2303 were conducted under both positive and negative dc voltages for silicone rubber samples filled with micron and nano sized particles to understand the phenomena occurring during such tests. Micron sized Alumina Trihydrate (ATH) and nano sized alumina fillers were added to silicone rubber matrix to improve the resistance to tracking and erosion. The leakage current during the tests and the eroded mass at the end of the tests were monitored. Scanning Electron Microscopy (SEM) and Energy dispersive Xray (EDX) studies were conducted to understand the filler dispersion and the changes in surface morphology in both nanocomposite and microcomposite samples. The results suggest that nanocomposites performed better than microcomposites even for a small filler loading (4%) for both positive and negative dc stresses. It was also seen that the tracking and erosion performance of silicone rubber is better under negative dc as compared to positive dc voltage. EDX studies showed migration of different ions onto the surface of the sample during the IP test under positive dc which has led to an inferior performance as compared to the performance under negative dc.

Optical, electrical and structural characterization of ZnO:Al thin films prepared by a low cost sol-gel method

ZnO:Al thin films were prepared on glass and silicon substrates by the sol-gel spin coating method. The x-ray diffraction (XRD) results showed that a polycrystalline phase with a hexagonal structure appeared after annealing at 400 degrees C for 1 h. The transmittance increased from 91 to about 93% from pure ZnO films to ZnO film doped with 1 wt% Al and then decreased for 2 wt% Al. The optical band gap energy increased as the doping concentration was increased from 0.5 wt% to 1 wt% Al. The metal oxide semiconductor (MOS) capacitors were fabricated using ZnO films deposited on silicon (100) substrates and electrical properties such as current versus voltage (I-V) and capacitance versus voltage (C-V) characteristics were studied. The electrical resistivity decreased and the leakage current increased with an increase of annealing temperature. The dielectric constant was found to be 3.12 measured at 1 MHz. The dissipation value for the film annealed at 300 degrees C was found to be 3.1 at 5 V. (C) 2011 Elsevier Ltd. All rights reserved.

High-Performance Metal-Insulator-Metal Capacitors Using Europium Oxide as Dielectric

We report the first demonstration of metal-insulator-metal (MIM) capacitors with Eu2O3 dielectric for analog and DRAM applications. The influence of different anneal conditions on the electrical characteristics of the fabricated MIM capacitors is studied. FG anneal results in high capacitance density (7 fF/mu m(2)), whereas oxygen anneal results in low quadratic voltage coefficient of capacitance (VCC) (194 ppm/V-2 at 100 kHz), and argon anneal results in low leakage current density (3.2 x 10(-8) A/cm(2) at -1 V). We correlate these electrical results with the surface chemical states of the films through X-ray photoelectron spectroscopy measurements. In particular, FG anneal and argon anneal result in sub-oxides, which modulate the electrical properties.

Substrate temperature influenced physical properties of silicon MOS devices with TiO2 gate dielectric

DC reactive magnetron sputtering technique was employed for deposition of titanium dioxide (TiO2) films. The films were formed on Corning glass and p-Si (100) substrates by sputtering of titanium target in an oxygen partial pressure of 6x10-2 Pa and at different substrate temperatures in the range 303 673 K. The films formed at 303 K were X-ray amorphous whereas those deposited at substrate temperatures?=?473 K were transformed into polycrystalline nature with anatase phase of TiO2. Fourier transform infrared spectroscopic studies confirmed the presence of characteristic bonding configuration of TiO2. The surface morphology of the films was significantly influenced by the substrate temperature. MOS capacitor with Al/TiO2/p-Si sandwich structure was fabricated and performed currentvoltage and capacitancevoltage characteristics. At an applied gate voltage of 1.5 V, the leakage current density of the device decreased from 1.8?x?10-6 to 5.4?x?10-8 A/cm2 with the increase of substrate temperature from 303 to 673 K. The electrical conduction in the MOS structure was more predominant with Schottky emission and Fowler-Nordheim conduction. The dielectric constant (at 1 MHz) of the films increased from 6 to 20 with increase of substrate temperature. The optical band gap of the films increased from 3.50 to 3.56 eV and refractive index from 2.20 to 2.37 with the increase of substrate temperature from 303 to 673 K. Copyright (c) 2012 John Wiley & Sons, Ltd.

Electrothermal Ageing of Epoxy Nanocomposites

Constant stress accelerated ageing experiments were conducted on unfilled epoxy and epoxy alumina nanocomposites with different filler loadings of 0.1, 1 and 5 wt%. Electrical (6 kV/mm), thermal (60 degrees C) and combined electrothermal (6 kV/mm and 60 degrees C) ageing experiments were performed for a duration of 250 h. The leakage current through the samples were continuously monitored and the variation in the tan delta values with ageing duration was also monitored. It was observed that the increase in the tan delta value with ageing duration was less for the epoxy alumina nanocomposites as compared to the unfilled epoxy. Dielectric spectroscopy measurements were performed on the samples before and after the ageing in the frequency range of 10(-2) to 10(6) Hz. The permittivity and tan delta values were found to increase in the low frequency range. The volume resistivity of unfilled epoxy and epoxy alumina nanocomposites were also measured before and after the ageing. The volume resistivity improved marginally for the thermally aged samples, but reduced for the electrically aged and the electrothermally aged samples. The decrease in the value of volume resistivity was more for the multistress aged unfilled epoxy samples as compared to the multistress aged epoxy alumina nanocomposites. It was also observed that the unfilled epoxy samples having a higher value of tan delta failed first. The time to failure of the samples showed an increasing trend with an increase in the nano filler loading of epoxy alumina nanocomposites.

Effect of Temperature Cycling on Conduction Mechanisms in CdTe Thin Films

CdTe thin films of 500 thickness prepared by thermal evaporation technique were analyzed for leakage current and conduction mechanisms. Metal-insulator-metal (MIM) capacitors were fabricated using these films as a dielectric. These films have many possible applications, such as passivation for infrared diodes that operate at low temperatures (80 K). Direct-current (DC) current-voltage (I-V) and capacitance-voltage (C-V) measurements were performed on these films. Furthermore, the films were subjected to thermal cycling from 300 K to 80 K and back to 300 K. Typical minimum leakage currents near zero bias at room temperature varied between 0.9 nA and 0.1 mu A, while low-temperature leakage currents were in the range of 9.5 pA to 0.5 nA, corresponding to resistivity values on the order of 10(8) a''broken vertical bar-cm and 10(10) a''broken vertical bar-cm, respectively. Well-known conduction mechanisms from the literature were utilized for fitting of measured I-V data. Our analysis indicates that the conduction mechanism in general is Ohmic for low fields < 5 x 10(4) V cm(-1), while the conduction mechanism for fields > 6 x 10(4) V cm(-1) is modified Poole-Frenkel (MPF) and Fowler-Nordheim (FN) tunneling at room temperature. At 80 K, Schottky-type conduction dominates. A significant observation is that the film did not show any appreciable degradation in leakage current characteristics due to the thermal cycling.

Performance and reliability of Gd2O3 and stacked Gd2O3-Eu2O3 metal-insulator-metal capacitors

Gd2O3-based metal-insulator-metal capacitors have been characterized with single layer (Gd2O3) and bilayer (Gd2O3/Eu2O3 and Eu2O3/Gd2O3) stacks for analog and DRAM applications. Although single layer Gd2O3 capacitors provide highest capacitance density (15 fF/mu m(2)), they suffer from high leakage current density, poor capacitance density-voltage linearity, and reliability. The stacked dielectrics help to reduce leakage current density (1.2x10(-5) A/cm(2) and 2.7 x 10(-5) A/cm(2) for Gd2O3/Eu2O3 and Eu2O3/Gd2O3, respectively, at -1 V), improve quadratic voltage coefficient of capacitance (331 ppm/V-2 and 374 ppm/V-2 for Gd2O3/Eu2O3 and Eu2O3/Gd2O3, respectively, at 1 MHz), and improve reliability, with a marginal reduction in capacitance density. This is attributed to lower trap heights as determined from Poole-Frenkel conduction mechanism, and lower defect density as determined from electrode polarization model.

Structural, electrical and dielectric properties of sputtered TiO2 films for Al/TiO2/Si capacitors

Metal-oxide semiconductor capacitors based on titanium dioxide (TiO2) gate dielectrics were prepared by RF magnetron sputtering technique. The deposited films were post-annealed at temperatures in the range 773-1173 K in air for 1 hour. The effect of annealing temperature on the structural properties of TiO2 films was investigated by X-ray diffraction and Raman spectroscopy, the surface morphology was studied by atomic force microscopy (AFM) and the electrical properties of Al/TiO2/p-Si structure were measured recording capacitance-voltage and current-voltage characteristics. The as-deposited films and the films annealed at temperatures lower than 773 K formed in the anatase phase, while those annealed at temperatures higher than 973 K were made of mixtures of the rutile and anatase phases. FTIR analysis revealed that, in the case of films annealed at 1173 K, an interfacial layer had formed, thereby reducing the dielectric constant. The dielectric constant of the as-deposited films was 14 and increased from 25 to 50 with increases in the annealing temperature from 773 to 973 K. The leakage current density of as-deposited films was 1.7 x 10(-5) and decreased from 4.7 X 10(-6) to 3.5 x 10(-9) A/cm(2) with increases in the annealing temperature from 773 to 1173 K. The electrical conduction in the Al/TiO2/p-Si structures was studied on the basis of the plots of Schottky emission, Poole-Frenkel emission and Fowler-Nordheim tunnelling. The effect of structural changes on the current-voltage and capacitance-voltage characteristics of Al/TiO2/p-Si capacitors was also discussed.

Post-deposition annealing influenced structural and electrical properties of Al/TiO2/Si gate capacitors

Titanium dioxide (TiO2) thin films are deposited on unheated p-Si (100) and quartz substrates by employing DC reactive magnetron sputtering technique. The effect of post-deposition annealing in air at temperatures in the range 673-973 K on the structural, electrical, and dielectric properties of the films was investigated. The chemical composition of the TiO2 films was analyzed with X-ray photoelectron spectroscopy. The surface morphology of the films was studied by atomic force microscope. The optical band gap of the as-deposited film was 3.50 eV, and it increased to 3.55 eV with the increase in annealing temperature to 773 K. The films annealed at higher temperature of 973 K showed the optical band gap of 3.43 eV. Thin film capacitors were fabricated with the MOS configuration of Al/TiO2/p-Si. The leakage current density of the as-deposited films was 1.2 x 10(-6) A/cm(2), and it decreased to 5.9 x 10(-9) A/cm(2) with the increase in annealing temperature to 973 K. These films showed high dielectric constant value of 36. (C) 2013 Elsevier Ltd. All rights reserved.