Fault-Tolerant Average Execution Time Optimization for General Purpose Multi-Processor System-on Chips

Fault-tolerance is due to the semiconductor technology development important, not only for safety-critical systems but also for general-purpose (non-safety critical) systems. However, instead of guaranteeing that deadlines always are met, it is for general-purpose systems important to minimize the average execution time (AET) while ensuring fault-tolerance. For a given job and a soft (transient) error probability, we define mathematical formulas for AET that includes bus communication overhead for both voting (active replication) and rollback-recovery with checkpointing (RRC). And, for a given multi-processor system-on-chip (MPSoC), we define integer linear programming (ILP) models that minimize AET including bus communication overhead when: (1) selecting the number of checkpoints when using RRC, (2) finding the number of processors and job-to-processor assignment when using voting, and (3) defining fault-tolerance scheme (voting or RRC) per job and defining its usage for each job. Experiments demonstrate significant savings in AET.

Bounds on Defect Level and Fault Coverage in Linear Analog Circuit Testing

Transfer function coefficients (TFC) are widely used to test linear analog circuits for parametric and catastrophic faults. This paper presents closed form expressions for an upper bound on the defect level (DL) and a lower bound on fault coverage (FC) achievable in TFC based test method. The computed bounds have been tested and validated on several benchmark circuits. Further, application of these bounds to scalable RC ladder networks reveal a number of interesting characteristics. The approach adopted here is general and can be extended to find bounds of DL and FC of other parametric test methods for linear and non-linear circuits.

Surface effects on stacking fault and twin formation in fcc nanofilms: A first-principles study

The free surface effects on stacking fault and twin formation in fcc metals (Al, Cu, and Ni) were examined by first-principles calculations based on density functional theory (DFT). It is found that the generalized planar fault (GPF) energies of Ni are much larger than bulk Ni with respect to Al and Cu. The discrepancy is attributed to the localized relaxation of Ni nanofilm to accommodate the large expansion of the inter-planar separation induced at the fault plane. The localized relaxation can be coupled to the electronic structure of Ni nanofilms. (C) 2011 Elsevier B.V. All rights reserved.

The June 2010 Nicobar Earthquake: Fault Reactivation on the Subducting Oceanic Plate

The similar to 1300-km-long rupture zone of the 2004 Andaman-Sumatra megathrust earthquake continues to generate a mix of thrust, normal, and strike-slip faulting events. The 12 June 2010 M(w) 7.5 event on the subducting plate is the most recent large earthquake on the Nicobar segment. The left-lateral faulting mechanism of this event is unusual for the outer-rise region, considering the stress transfer processes that follow great underthrusting earthquakes. Another earthquake (M(w) 7.2) with a similar mechanism occurred very close to this event on 24 July 2005. These earthquakes and most of their aftershocks on the subducting plate were generated by left-lateral strike-slip faulting on north-northeast-south-southwest oriented near-vertical faults, in response to north-northwest-south-southeast directed compression. Pre-2004 earthquake faulting mechanisms on the subducting oceanic plate are consistent with this pattern. Post-2004, left-lateral faulting on the subducting oceanic plate clusters between 5 degrees N and 9 degrees N, where the 90 degrees E ridge impinges the trench axis. Our study observes that the subducting plate off the Sumatra and Nicobar segments behaves similarly to a chip of the India-Australia plate, deforming in response to a generally northwest-southeast oriented compression, an aspect that must be factored into the plate deformation models.

Fault-Diagnostic System using Support Vector Machines for Power Transmission Systems

This paper presents an approach for identifying the faulted line section and fault location on transmission systems using support vector machines (SVMs) for diagnosis/post-fault analysis purpose. Power system disturbances are often caused by faults on transmission lines. When fault occurs on a transmission system, the protective relay detects the fault and initiates the tripping operation, which isolates the affected part from the rest of the power system. Based on the fault section identified, rapid and corrective restoration procedures can thus be taken to minimize the power interruption and limit the impact of outage on the system. The approach is particularly important for post-fault diagnosis of any mal-operation of relays following a disturbance in the neighboring line connected to the same substation. This may help in improving the fault monitoring/diagnosis process, thus assuring secure operation of the power systems. In this paper we compare SVMs with radial basis function neural networks (RBFNN) in data sets corresponding to different faults on a transmission system. Classification and regression accuracy is reported for both strategies. Studies on a practical 24-Bus equivalent EHV transmission system of the Indian Southern region is presented for indicating the improved generalization with the large margin classifiers in enhancing the efficacy of the chosen model.

Fault-tolerant Video on Demand in RSerPool Architecture

With the advent of Internet, video over IP is gaining popularity. In such an environment, scalability and fault tolerance will be the key issues. Existing video on demand (VoD) service systems are usually neither scalable nor tolerant to server faults and hence fail to comply to multi-user, failure-prone networks such as the Internet. Current research areas concerning VoD often focus on increasing the throughput and reliability of single server, but rarely addresses the smooth provision of service during server as well as network failures. Reliable Server Pooling (RSerPool), being capable of providing high availability by using multiple redundant servers as single source point, can be a solution to overcome the above failures. During a possible server failure, the continuity of service is retained by another server. In order to achieve transparent failover, efficient state sharing is an important requirement. In this paper, we present an elegant, simple, efficient and scalable approach which has been developed to facilitate the transfer of state by the client itself, using extended cookie mechanism, which ensures that there is no noticeable change in disruption or the video quality.

Robust Observer Design with Application to Fault Detection

A new scheme for robust estimation of the partial state of linear time-invariant multivariable systems is presented, and it is shown how this may be used for the detection of sensor faults in such systems. We consider an observer to be robust if it generates a faithful estimate of the plant state in the face of modelling uncertainty or plant perturbations. Using the Stable Factorization approach we formulate the problem of optimal robust observer design by minimizing an appropriate norm on the estimation error. A logical candidate is the 2-norm, corresponding to an H�¿ optimization problem, for which solutions are readily available. In the special case of a stable plant, the optimal fault diagnosis scheme reduces to an internal model control architecture.

Ground-fault-arc suppression on series-and shunt-compensated lines

An extension of Rizk's analysis to cover any type of switching is presented for calculating the residual current and recovery voltage in a singlephase switched transmission system. Equations for the determination of the current and voltage are shown, and the method has been used for the analysis of a series- and shunt-compensated line.Three possible switching methods for the effective control of the recovery voltage and residual current are discussed: normal switching, switching at the ends of the line and switching of the series capacitors.

mRegistry: a registry representation for fault diagnosis

Microsoft Windows uses the notion of registry to store all configuration information. The registry entries have associations and dependencies. For example, the paths to executables may be relative to some home directories. The registry being designed with faster access as one of the objectives does not explicitly capture these relations. In this paper, we explore a representation that captures the dependencies more explicitly using shared and unifying variables. This representation, called mRegistry exploits the tree-structured hierarchical nature of the registry, is concept-based and obtained in multiple stages. mRegistry captures intra-block, inter-block and ancestor-children dependencies (all leaf entries of a parent key in a registry put together as an entity constitute a block thereby making the block as the only child of the parent). In addition, it learns the generalized concepts of dependencies in the form of rules. We show that mRegistry has several applications: fault diagnosis, prediction, comparison, compression etc.