Derating Based Hardware Optimizations in Soft Error Tolerant Designs

Ensuring reliable operation over an extended period of time is one of the biggest challenges facing present day electronic systems. The increased vulnerability of the components to atmospheric particle strikes poses a big threat in attaining the reliability required for various mission critical applications. Various soft error mitigation methodologies exist to address this reliability challenge. A general solution to this problem is to arrive at a soft error mitigation methodology with an acceptable implementation overhead and error tolerance level. This implementation overhead can then be reduced by taking advantage of various derating effects like logical derating, electrical derating and timing window derating, and/or making use of application redundancy, e. g. redundancy in firmware/software executing on the so designed robust hardware. In this paper, we analyze the impact of various derating factors and show how they can be profitably employed to reduce the hardware overhead to implement a given level of soft error robustness. This analysis is performed on a set of benchmark circuits using the delayed capture methodology. Experimental results show upto 23% reduction in the hardware overhead when considering individual and combined derating factors.

On t-designs and bounds relating query complexity to error resilience in locally correctable codes

An n-length block code C is said to be r-query locally correctable, if for any codeword x ∈ C, one can probabilistically recover any one of the n coordinates of the codeword x by querying at most r coordinates of a possibly corrupted version of x. It is known that linear codes whose duals contain 2-designs are locally correctable. In this article, we consider linear codes whose duals contain t-designs for larger t. It is shown here that for such codes, for a given number of queries r, under linear decoding, one can, in general, handle a larger number of corrupted bits. We exhibit to our knowledge, for the first time, a finite length code, whose dual contains 4-designs, which can tolerate a fraction of up to 0.567/r corrupted symbols as against a maximum of 0.5/r in prior constructions. We also present an upper bound that shows that 0.567 is the best possible for this code length and query complexity over this symbol alphabet thereby establishing optimality of this code in this respect. A second result in the article is a finite-length bound which relates the number of queries r and the fraction of errors that can be tolerated, for a locally correctable code that employs a randomized algorithm in which each instance of the algorithm involves t-error correction.

The exploration of Kemp's triacid (KTA) as the core for the synthesis of 3-fold symmetric 2(3)-cyclophane, 2(2)-cyclophane and novel linker directed designs

For the first time, two units of KTA have been linked to three units of cyst-di-OMe. The reaction is noteworthy since it involves the formation of six amide bonds leading to a three-fold symmetric 23-cyclophane (3) harboring a cluster of three S-S bridges. The major product is a di-imide (4), arising from the interaction of a cystine NH with a neighbouring activated ester. A third reaction of tethering KTA with a single cyst-di-OMe unit afforded the flexible compound 6 and, with benzidine, the novel linker directed 7 with orthogonally disposed anchor modules.

Layered Exact-Repair Regenerating Codes via Embedded Error Correction and Block Designs

A new class of exact-repair regenerating codes is constructed by stitching together shorter erasure correction codes, where the stitching pattern can be viewed as block designs. The proposed codes have the help-by-transfer property where the helper nodes simply transfer part of the stored data directly, without performing any computation. This embedded error correction structure makes the decoding process straightforward, and in some cases the complexity is very low. We show that this construction is able to achieve performance better than space-sharing between the minimum storage regenerating codes and the minimum repair-bandwidth regenerating codes, and it is the first class of codes to achieve this performance. In fact, it is shown that the proposed construction can achieve a nontrivial point on the optimal functional-repair tradeoff, and it is asymptotically optimal at high rate, i.e., it asymptotically approaches the minimum storage and the minimum repair-bandwidth simultaneously.

LDPC Code Designs Based on root I Matrices

LDPC codes can be constructed by tiling permutation matrices that belong to the square root of identity type and similar algebraic structures. We investigate into the properties of such codes. We also present code structures that are amenable for efficient encoding.

SYNTHESIS OF CONCEPTUAL DESIGNS FOR SENSORS USING SAPPHIRE-LITE

The demand for variety of products and the shorter time to market is encouraging designers to adopt computer aided concept generation techniques. One such technique is being explored here. The present work makes an attempt towards synthesis of concepts for sensors using physical laws and effects as building blocks. A database of building blocks based upon the SAPPhIRE-lite model of causality is maintained. It uses composition to explore the solution space. The algorithm has been implemented in a web based tool. The tool generates two types of sensor designs: direct sensing designs and feedback sensing designs. According to the literature, synthesis using building blocks often lead to vague solutions principles. The current work tries to avoid uninteresting solutions by using some heuristics. A particularly novel outcome of the work described here is the generation of feedback based solutions, something not generated automatically before. A number of patent violations were observed with the set of generated concepts; thus emphasizing some amount of novelty in the designs.