Study of third-order non-linear systems- Variation of parameters approach

In this paper, the transient response of a third-order non-linear system is obtained by first reducing the given third-order equation to three first-order equations by applying the method of variation of parameters. On the assumption that the variations of amplitude and phase are small, the functions are expanded in ultraspherical polynomials. The expansion is restricted to the constant term. The resulting equations are solved to obtain the response of the given third-order system. A numerical example is considered to illustrate the method. The results show that the agreement between the approximate and digital solution is good thus vindicating the approximation.

The pulse response of non-linear third order systems

The response of a third order non-linear system subjected to a pulse excitation is analysed. A transformation of the displacement variable is effected. The transformation function chosen is the solution of the linear problem subjected to the same pulse. With this transformation the equation of motion is brought into a form in which the method of variation of parameters is applicable for the solution of the problem. The method is applied to a single axis gyrostabilized platform subjected to an exponentially decaying pulse. The analytical results are compared with digital and analog computer solutions.

Novel window functions for digital filters

Window technique is one of the simplest methods to design Finite Impulse Response (FIR) filters. It uses special functions to truncate an infinite sequence to a finite one. In this paper, we propose window techniques based on integer sequences. The striking feature of the proposed work is that it overcomes all the problems posed by floating point numbers and inaccuracy, as the sequences are made of only integers. Some of these integer window sequences, yield sharp transition, while some of them result in zero ripple in passband and stopband.

Application of ultraspherical polynomials to non-linear autonomous systems

This paper deals with the approximate solutions of non-linear autonomous systems by the application of ultraspherical polynomials. From the differential equations for amplitude and phase, set up by the method of variation of parameters, the approximate solutions are obtained by a generalized averaging technique based on the ultraspherical polynomial expansions. The method is illustrated with examples and the results are compared with the digital and analog computer solutions. There is a close agreement between the analytical and exact results.

An approximate analysis of non-linear non-conservative systems subjected to step function excitation

This paper deals with the approximate analysis of the step response of non-linear nonconservative systems by the application of ultraspherical polynomials. From the differential equations for amplitude and phase, set up by the method of variation of parameters, the approximate solutions are obtained by a generalized averaging technique based on ultraspherical polynomial expansions. The Krylov-Bogoliubov results are given by a particular set of these polynomials. The method has been applied to study the step response of a cubic spring mass system in presence of viscous, material, quadratic, and mixed types of damping. The approximate results are compared with the digital and analogue computer solutions and a close agreement has been found between the analytical and the exact results.

Study Of The Hvdc-Torsional Interactions Through Digital Dynamic Simulation

This paper presents the detailed dynamic digital simulation for the study of phenomenon of torsional interaction between HVDC-Turbine generator shaft, dynamics using the novel converter model presented in [ 1 ] The system model includes detailed representation of the synchronous generator and the shaft dynamics, the ac and dc network transients. The results of a case study indicate the various factors that influence the torsional interaction.

In-situ power monitoring scheme and its application in dynamic voltage and threshold scaling for digital CMOS integrated circuits

An in-situ power monitoring technique for Dynamic Voltage and Threshold scaling (DVTS) systems is proposed which measures total power consumed by load circuit using sleep transistor acting as power sensor. Design details of power monitor are examined using simulation framework in UMC 90nm CMOS process. Experimental results of test chip fabricated in AMS 0.35µm CMOS process are presented. The test chip has variable activity between 0.05 and 0.5 and has PMOS VTH control through nWell contact. Maximum resolution obtained from power monitor is 0.25mV. Overhead of power monitor in terms of its power consumption is 0.244 mW (2.2% of total power of load circuit). Lastly, power monitor is used to demonstrate closed loop DVTS system. DVTS algorithm shows 46.3% power savings using in-situ power monitor.

Dynamic Supply and Threshold Voltage Scaling for CMOS Digital Circuits Using In-Situ Power Monitor

A generalized power tracking algorithm that minimizes power consumption of digital circuits by dynamic control of supply voltage and the body bias is proposed. A direct power monitoring scheme is proposed that does not need any replica and hence can sense total power consumed by load circuit across process, voltage, and temperature corners. Design details and performance of power monitor and tracking algorithm are examined by a simulation framework developed using UMC 90-nm CMOS triple well process. The proposed algorithm with direct power monitor achieves a power savings of 42.2% for activity of 0.02 and 22.4% for activity of 0.04. Experimental results from test chip fabricated in AMS 350 nm process shows power savings of 46.3% and 65% for load circuit operating in super threshold and near sub-threshold region, respectively. Measured resolution of power monitor is around 0.25 mV and it has a power overhead of 2.2% of die power. Issues with loop convergence and design tradeoff for power monitor are also discussed in this paper.

A mostly-digital analog scan-out chain for low bandwidth voltage measurement for analog IP test

A method of precise measurement of on-chip analog voltages in a mostly-digital manner, with minimal overhead, is presented. A pair of clock signals is routed to the node of an analog voltage. This analog voltage controls the delay between this pair of clock signals, which is then measured in an all-digital manner using the technique of sub-sampling. This sub-sampling technique, having measurement time and accuracy trade-off, is well suited for low bandwidth signals. This concept is validated by designing delay cells, using current starved inverters in UMC 130nm CMOS process. Sub-mV accuracy is demonstrated for a measurement time of few seconds.

Stability of control systems with time delay

To find the approximate stability limit on the forward gain in control systems with small time delay, this note suggests approximating the exponential in the characteristic equation by the first few terms of its series and using the Routh–Hurwitz criterion. This approximation avoids all the time-consuming graphical work and gives a somewhat pessimistic maximum bound for the gain constant.

Class of linear time-varying discrete systems

A class of linear time-varying discrete systems is considered, and closed-form solutions are obtained in different cases. Some comments on stability are also included.

Analysis of ferro-oscillations in power systems

The paper presents an analysis of ferro-oscillations in capacitor voltage transformers and series-compensated e.h.v. lines. The dual-input describing function is adopted to show the regions of existence and the influence of system parameters on such oscillations. A complete analytical method suitable for digital computation has been developed for determining the amplitudes of these oscillations.

Design of linear systems for decoupling and disturbance rejection

The question of achieving decoupling and asymptotic disturbance rejection in time-invariant linear multivariable systems subject to unmeasurable arbitrary disturbances of a given class is discussed. A synthesis procedure which determines a feedback structure, incorporating an integral compensator, is presented.

Dynamic Supply and Threshold Voltage Scaling for CMOS Digital Circuits Using In-Situ Power Monitor

A generalized power tracking algorithm that minimizes power consumption of digital circuits by dynamic control of supply voltage and the body bias is proposed. A direct power monitoring scheme is proposed that does not need any replica and hence can sense total power consumed by load circuit across process, voltage, and temperature corners. Design details and performance of power monitor and tracking algorithm are examined by a simulation framework developed using UMC 90-nm CMOS triple well process. The proposed algorithm with direct power monitor achieves a power savings of 42.2% for activity of 0.02 and 22.4% for activity of 0.04. Experimental results from test chip fabricated in AMS 350 nm process shows power savings of 46.3% and 65% for load circuit operating in super threshold and near sub-threshold region, respectively. Measured resolution of power monitor is around 0.25 mV and it has a power overhead of 2.2% of die power. Issues with loop convergence and design tradeoff for power monitor are also discussed in this paper.