Influence of sputter power on structural and electrical properties of TiO2 films for Al/TiO2/Si gate capacitors

Titanium dioxide (TiO2) thin films were deposited onto p-Si substrates held at room temperature by reactive Direct Current (DC) magnetron sputtering at various sputter powers in the range 80-200W. The as-deposited TiO2 films were annealed at a temperature of 1023K. The post-annealed films were characterized for crystallographic structure, chemical binding configuration, surface morphology and optical absorption. The electrical and dielectric properties of Al/TiO2/p-Si structure were determined from the capacitance-voltage and current-voltage characteristics. X-ray diffraction studies confirmed that the as-deposited films were amorphous in nature. After post-annealing at 1023K, the films formed at lower powers exhibited anatase phase, where as those deposited at sputter powers >160W showed the mixed anatase and rutile phases of TiO2. The surface morphology of the films varied significantly with the increase of sputter power. The electrical and dielectric properties on the air-annealed Al/TiO2/p-Si structures were studied. The effect of sputter power on the electrical and dielectric characteristics of the structure of Al/TiO2/p-Si (metal-insulator-semiconductor) was systematically investigated. Copyright (c) 2014 John Wiley & Sons, Ltd.

Coconut kernel-derived activated carbon as electrode material for electrical double-layer capacitors

Carbonization of milk-free coconut kernel pulp is carried out at low temperatures. The carbon samples are activated using KOH, and electrical double-layer capacitor (EDLC) properties are studied. Among the several samples prepared, activated carbon prepared at 600 A degrees C has a large surface area (1,200 m(2) g(-1)). There is a decrease in surface area with increasing temperature of preparation. Cyclic voltammetry and galvanostatic charge-discharge studies suggest that activated carbons derived from coconut kernel pulp are appropriate materials for EDLC studies in acidic, alkaline, and non-aqueous electrolytes. Specific capacitance of 173 F g(-1) is obtained in 1 M H2SO4 electrolyte for the activated carbon prepared at 600 A degrees C. The supercapacitor properties of activated carbon sample prepared at 600 A degrees C are superior to the samples prepared at higher temperatures.

Effect of film thickness and annealing on optical properties of TiO2 thin films and electrical characterization of MOS capacitors

Titanium dioxide (TiO2) thin films were deposited on glass and silicon (100) substrates by the sol-gel method. The influence of film thickness and annealing temperature on optical transmittance/reflectance of TiO2 films was studied. TiO2 films were used to fabricate metal-oxide-semiconductor capacitors. The capacitance-voltage (C-V), dissipation-voltage (D-V) and current-voltage (I-V) characteristics were studied at different annealing temperatures and the dielectric constant, current density and resistivity were estimated. The loss tangent (dissipation) increased with increase of annealing temperature.

Room Temperature-Processed TiO2 MIM Capacitors for DRAM Applications

We report the room temperature fabrication of Ta/TiO2/Ta metal-insulator-metal (MIM) capacitors (mainly, for DRAM applications). The fabricated devices show high capacitance density (similar to 15 fF/mu m(2)), and low leakage current density of 6.4 X 10(-8) A/cm(2) (27 degrees C) and 3.3 x 10(-6) A/cm(2) (125 degrees C) at -1 V. We analyze the electrical and material characteristics of the fabricated capacitors, and compare the device performance of these capacitors with other TiO2 and TiO2-based MIM capacitors reported in recent literature.

High-Performance Stacked TiO2-ZrO2 and Si-doped ZrO2 Metal-Insulator-Metal Capacitors

Metal-insulator-metal (MIM) capacitors for DRAM applications have been realised using stacked TiO2-ZrO2 (TiO2/ZrO2 and ZrO2/TiO2) and Si-doped ZrO2 (TiO2/Si-doped ZrO2) dielectrics. High capacitance densities (> 42 fF/mu m(2)), low leakage current densities (< 5 x 10(-7) A/cm(2) at -1 V), and sub-nm EOT (< 0.8 nm) have been achieved. The effects of constant voltage stress on the device characteristics is studied. The structural analysis of the samples is performed by X-ray diffraction measurements, and this is correlated to the electrical characteristics of the devices. The surface chemical states of the films are analyzed through X-ray photoelectron spectroscopy measurements. The doped-dielectric stack (TiO2/Si-doped ZrO2) helps to reduce leakage current density and improve reliability, with a marginal reduction in capacitance density; compared to their undoped counterparts (TiO2/ZrO2 and ZrO2/TiO2). We compare the device performance of the fabricated capacitors with other stacked high-k MIM capacitors reported in recent literature.

Load-Commutated SCR Current-Source-Inverter-Fed Induction Motor Drive With Sinusoidal Motor Voltage and Current

Current source inverter (CSI) is an attractive solution in high-power drives. The conventional gate turn-off thyristor (GTO) based CSI-fed induction motor drives suffer from drawbacks such as low-frequency torque pulsation, harmonic heating, and unstable operation at low-speed ranges. These drawbacks can be overcome by connecting a current-controlled voltage source inverter (VSI) across the motor terminal replacing the bulky ac capacitors. The VSI provides the harmonic currents, which results in sinusoidal motor voltage and current even with the CSI switching at fundamental frequency. This paper proposes a CSI-fed induction motor drive scheme where GTOs are replaced by thyristors in the CSI without any external circuit to assist the turning off of the thyristors. Here, the current-controlled VSI, connected in shunt, is designed to supply the volt ampere reactive requirement of the induction motor, and the CSI is made to operate in leading power factor mode such that the thyristors in the CSI are autosequentially turned off. The resulting drive will be able to feed medium-voltage, high-power induction motors directly. A sensorless vector-controlled CSI drive based on the proposed configuration is developed. The experimental results from a 5 hp prototype are presented. Experimental results show that the proposed drive has stable operation throughout the operating range of speeds.

Simultaneous Electrodeposition of MnO2 and Mn(OH)(2) for Supercapacitor Studies

Among the various Mn compounds, both MnO2 and Mn(OH)2 are electrochemically active in supercapacitor studies. MnO2 and Mn(OH)2 are simultaneously deposited, through a one-pot method, on the anode and cathode, respectively, of a galvanostatic electrolysis cell consisting of aqueous Mn(NO3)2 electrolyte. MnO2 and Mn(OH)2 coated stainless steel (SS) electrodes are found to exhibit a capacitive behavior with a high specific capacitance. MnO2/SS and Mn(OH)2/SS electrodes are used as the negative and positive electrodes, respectively, in assembling nonsymmetrical capacitors and testing. The results indicate that both Mn-based electrodes prepared simultaneously in a single electrolysis possess interesting electrochemical properties for supercapacitor application.

A Front end Switched Rectifier DC Source for Neutral Point Balancing of A NPC Three-Level Inverter for The Full Modulation Range

A switched DC voltage three level NPC is proposed in this paper to eliminate capacitor balancing problems in conventional three-level Neutral Point Clamped (NPC) inverter. The proposed configuration requires only one DC link with a voltage V-dc/2, where V-dc is the DC link voltage in a onventional NPC inverter. To get rated DC link voltage (V-dc), the voltage source is alternately onnected in parallel to one of the two series capacitors using two switches and two diodes with device voltage rating of V-dc/2. The frequency at which the voltage source is switched is independent and will not affect the operation of NPC inverter. The switched voltage source in this configuration balances the capacitors automatically. The proposed configuration can also be used as a conventional two level inverter in lower modulation range, thereby increases the reliability of the drive system. A space vector based PWM scheme is used to verify this proposed topology.

Generation of High Magnetic Fields Using Thyristors

This paper describes the use of high-power thyristors in conjunction with a low-voltage supply for generating pulsed magnetic fields. A modular bank of electrolytic capacitors is charged through a programmable solid-state power supply and then rapidly discharged through a bank of thyristors into a magnetizing coil. The modular construction of capacitor banks enables the discrete control of pulse energy and time. Peak fields up to 15 telsa (150 KOe) and a half period of about 200 microseconds are generated through the discharges. Still higher fields are produced by discharging into a precooled coil ( 77°K). Measurement method for a pulsed field is described.

Exfoliated graphite–ruthenium oxide composite electrodes for electrochemical supercapacitors

The performance of exfoliated graphite (EG)–ruthenium oxide (RuOx) composites as binderless electrodes is evaluated for electrochemical capacitors (ECs). A composite of EG–RuOx is prepared by a modified sol–gel process. The material is characterized using X-ray diffraction and microscopy. Electrochemical capacitors with the composite electrodes in the presence of aqueous sulfuric acid (H2SO4) electrolyte are evaluated using voltammetry, impedance and charge–discharge studies. Cyclic voltammetry reveals very stable current–voltage behaviour up to several thousands of cycles, as well as high specific capacitances, e.g., a few hundreds of farads per gram for the composite that contains 16.5 wt.% RuOx.

'Wet N2O oxidation' process and interface state density characterization of nanoscale nitrided SiO2 for flash memory application

In this paper we first present the 'wet N2O' furnace oxidation process to grow nitrided tunnel oxides in the thickness range 6 to 8 nm on silicon at a temperature of 800 degrees C. Electrical characteristics of MOS capacitors and MOSFETs fabricated using this oxide as gate oxide have been evaluated and the superior features of this oxide are ascertained The frequency response of the interface states, before and after subjecting the MOSFET gate oxide to constant current stress, is studied using a simple analytical model developed in this work.

Neutral-point balancing of neutral-point-clamped three-level inverter with a front end switched rectifier DC source for the full modulationn range

A switched rectifier DC voltage source three-level neutral-point-clamped (NPC) converter topology is proposed here to alleviate the inverter from capacitor voltage balancing in three-level drive systems. The proposed configuration requires only one DC link with a voltage of half of that needed in a conventional NPC inverter. To obtain a rated DC link voltage, the rectifier DC source is alternately connected in parallel to one of the two series capacitors using two switches and two diodes with device voltage ratings of half the total DC bus voltage. The frequency at which the voltage source is switched is independent of the inverter and will not affect its operation since the switched voltage source in this configuration balances the capacitors automatically. The proposed configuration can also be used as a conventional two-level inverter in the lower modulation index range, thereby increasing the reliability of the drivesystem. A space-vector-based PWM scheme is used to verify this proposed topology on a laboratory system.

Stress induced phase transition in monomolecular perfluroalkylsilane film self assembled on aluminium surface

We control the stiffnesses of two dual double cantelevers placed in series to control penetration into a perflurooctyltrichlorosilane monolayer self assembled on aluminium and silicon substrates. The top cantilever which carries the probe is displaced with respect to the bottom cantilever which carries the substrate, the difference in displacement recorded using capacitors gives penetration. We further modulate the input displacement sinusoidally to deconvolute the viscoelastic properties of the monolayer. When the intervention is limited to the terminal end of the molecule there is a strong viscous response in consonance with the ability of the molecule to dissipate energy by the generation of gauche defects freely. When the intervention reaches the backbone, at a contact mean pressure of 0.2GPa the damping disappears abruptly and the molecule registers a steep rise in elastic modulus and relaxation time constant, with increasing contact pressure. We offer a physical explanation of the process and describe this change as due to a phase transition from a liquid like to a solid like state.

Studies on design, fabrication and reliability assessment of embedded passives on a high-density interconnect (HDI) organic substrate using a sequential build-up process

One of the foremost design considerations in microelectronics miniaturization is the use of embedded passives which provide practical solution. In a typical circuit, over 80 percent of the electronic components are passives such as resistors, inductors, and capacitors that could take up to almost 50 percent of the entire printed circuit board area. By integrating passive components within the substrate instead of being on the surface, embedded passives reduce the system real estate, eliminate the need for discrete and assembly, enhance electrical performance and reliability, and potentially reduce the overall cost. Moreover, it is lead free. Even with these advantages, embedded passive technology is at a relatively immature stage and more characterization and optimization are needed for practical applications leading to its commercialization.This paper presents an entire process from design and fabrication to electrical characterization and reliability test of embedded passives on multilayered microvia organic substrate. Two test vehicles focusing on resistors and capacitors have been designed and fabricated. Embedded capacitors in this study are made with polymer/ceramic nanocomposite (BaTiO3) material to take advantage of low processing temperature of polymers and relatively high dielectric constant of ceramics and the values of these capacitors range from 50 pF to 1.5 nF with capacitance per area of approximately 1.5 nF/cm(2). Limited high frequency measurement of these capacitors was performed. Furthermore, reliability assessments of thermal shock and temperature humidity tests based on JEDEC standards were carried out. Resistors used in this work have been of three types: 1) carbon ink based polymer thick film (PTF), 2) resistor foils with known sheet resistivities which are laminated to printed wiring board (PWB) during a sequential build-up (SBU) process and 3) thin-film resistor plating by electroless method. Realization of embedded resistors on conventional board-level high-loss epoxy (similar to 0.015 at 1 GHz) and proposed low-loss BCB dielectric (similar to 0.0008 at > 40 GHz) has been explored in this study. Ni-P and Ni-W-P alloys were plated using conventional electroless plating, and NiCr and NiCrAlSi foils were used for the foil transfer process. For the first time, Benzocyclobutene (BCB) has been proposed as a board level dielectric for advanced System-on-Package (SOP) module primarily due to its attractive low-loss (for RF application) and thin film (for high density wiring) properties.Although embedded passives are more reliable by eliminating solder joint interconnects, they also introduce other concerns such as cracks, delamination and component instability. More layers may be needed to accommodate the embedded passives, and various materials within the substrate may cause significant thermo -mechanical stress due to coefficient of thermal expansion (CTE) mismatch. In this work, numerical models of embedded capacitors have been developed to qualitatively examine the effects of process conditions and electrical performance due to thermo-mechanical deformations.Also, a prototype working product with the board level design including features of embedded resistors and capacitors are underway. Preliminary results of these are presented.

Dielectric and dc electrical studies of antiferroelectric lead zirconate thin films

Antiferroelectric lead zirconate thin films were deposited using KrF (248 nm) excimer laser ablation technique. Utilization of antiferroelectric materials is proposed in high charge storage capacitors and microelectromechanical (MEMs) devices. The antiferroelectric nature of lead zirconate thin films was confirmed by the presence of double hysteresis behavior in polarization versus applied field response. By controlling the processing parameters, two types of microstructures evolved, namely columnar (or in-situ) and multi-grained (or ex-situ) in PZ thin films. The dielectric and electrical properties of the lead zirconate thin films were studied with respect to the processing parameters. Analysis on charge transport mechanism, using space charge limited conduction phenomenon, showed the presence of both shallow and deep trap sites in the PZ thin films. The estimated shallow trap energies were 0.448 and 0.491 eV for in-situ and ex-situ films, with respective concentrations of approximate to 7.9 x 10(18)/cc and approximate to 2.97 x 10(18)/cc. The deep trap energies with concentrations were 1.83 eV with 1.4 x 10(16)/cc for ex-situ and 1.76 eV with 3.8 x 10(16)/cc for in-situ PZ thin films, respectively. These activation energies were found to be consistent with the analysis from Arrhenius plots of de current densities. (C) 2000 Elsevier Science S.A. All rights reserved.