155 resultados para PEDOT:PSS transistor elettrochimico organico OECT sensori glucosio


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We show simultaneous p- and n-type carrier injection in a bilayer graphene channel by varying the longitudinal bias across the channel and the top-gate voltage. The top gate is applied electrochemically using solid polymer electrolyte and the gate capacitance is measured to be 1.5 microF cm(-2), a value about 125 times higher than the conventional SiO(2) back-gate capacitance. Unlike the single-layer graphene, the drain-source current does not saturate on varying the drain-source bias voltage. The energy gap opened between the valence and conduction bands using top- and back-gate geometry is estimated.

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The small signal ac response is measured across the source-drain terminals of poly(2,5-bis(3-tetradecylthiophen-2-yl)thieno[3,2-b]thiophene) field-effect transistor under dc bias to obtain the equivalent circuit parameters in the dark, and under a monochromatic light (540 nm) of various intensities. The numerically simulated response based on these parameters shows deviation at low frequency which is related to the charge accumulation at the interface and the contact resistance at the electrodes. This method can be used to differentiate the photophysical phenomena occurring in the bulk from that at the metal-semiconductor interface for polymer field-effect transistors. ©2009 American Institute of Physics

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We present low-frequency electrical resistance fluctuations, or noise, in graphene-based field-effect devices with varying number of layers. In single-layer devices, the noise magnitude decreases with increasing carrier density, which behaved oppositely in the devices with two or larger number of layers accompanied by a suppression in noise magnitude by more than two orders in the latter case. This behavior can be explained from the influence of external electric field on graphene band structure, and provides a simple transport-based route to isolate single-layer graphene devices from those with multiple layers. ©2009 American Institute of Physics

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In this work, for the first time, we present a physically based analytical threshold voltage model for omega gate silicon nanowire transistor. This model is developed for long channel cylindrical body structure. The potential distribution at each and every point of the of the wire is derived with a closed form solution of two dimensional Poisson's equation, which is then used to model the threshold voltage. Proposed model can be treated as a generalized model, which is valid for both surround gate and semi-surround gate cylindrical transistors. The accuracy of proposed model is verified for different device geometry against the results obtained from three dimensional numerical device simulators and close agreement is observed.

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Conjugated polymers are promising materials for electrochromic device technology. Aqueous dispersions of poly(3,4-ethylenedioxythiophene)-(PEDOT) were spin coated onto transparent conducting oxide (TCO) coated glass substrates. A seven-layer electrochromic device was fabricated with the following configuration: glass/transparent conducting oxide (TCO)/PEDOT (main electrochromic layer)/gel electrolyte/prussian blue (counter electrode)/TCO/glass. The device fabricated with counter electrode (Prussian blue) showed a contrast of 18% and without counter electrode showed visible contrast of 5% at 632 nm at a voltage of 1.9 V. The comparison of the device is done in terms of the colouration efficiency of the devices with and without counter electrode.

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In this paper, the effects of energy quantization on different single-electron transistor (SET) circuits (logic inverter, current-biased circuits, and hybrid MOS-SET circuits) are analyzed through analytical modeling and Monte Carlo simulations. It is shown that energy quantizationmainly increases the Coulomb blockade area and Coulomb blockade oscillation periodicity, and thus, affects the SET circuit performance. A new model for the noise margin of the SET inverter is proposed, which includes the energy quantization effects. Using the noise margin as a metric, the robustness of the SET inverter is studied against the effects of energy quantization. An analytical expression is developed, which explicitly defines the maximum energy quantization (termed as ``quantization threshold'') that an SET inverter can withstand before its noise margin falls below a specified tolerance level. The effects of energy quantization are further studiedfor the current-biased negative differential resistance (NDR) circuitand hybrid SETMOS circuit. A new model for the conductance of NDR characteristics is also formulated that explains the energy quantization effects.

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In this work, we investigate the intrinsic limits of subthreshold slope in a dual gated bilayer graphene transistor using a coupled self-consistent Poisson-bandstructure solver. We benchmark the solver by matching the bias dependent band gap results obtained from the solver against published experimental data. We show that the intrinsic bias dependence of the electronic structure and the self-consistent electrostatics limit the subthreshold slope obtained in such a transistor well above the Boltzmann limit of 60 mV/decade at room temperature, but much below the results experimentally shown till date, indicating room for technological improvement of bilayer graphene.

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There has been increasing interest on various properties and applications of electronically conducting polymers. Polyethylenedioxythiophene (PEDOT) is an interesting polymer of this type as it exhibits very high ionic conductivity. In the present study, PEDOT has been electrochemically deposited on stainless steel (SS) substrate for supercapacitor studies. PEDOT/SS electrodes prepared in 0.1M H2SO4 in presence of a surfactant, sodium dodecylsulphate (SDS), have been found to yield higher specific capacitance (SC) than the electrodes prepared from neutral aqueous electrolyte. The effects of concentration of H(2)SO4(,) concentration of SDS, potential of deposition, and nature of supporting electrolytes used for capacitor studies on SC of the PEDOT/SS electrodes have been studied. SC values as high as 250 F/g in 1M oxalic acid have been obtained during the initial stages of cycling. However, there is a rapid decrease in SC on repeated charge-discharge cycling. Spectroscopic data reflect structural changes in PEDOT on extended cycling. (C) 2007 Wiley Periodicals, Inc.

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Poly (3,4-ethylenedioxythiophene) (PEDOT) and poly (styrene sulphonic acid) (PSSA) supported platinum (Pt) electrodes for application in polymer electrolyte fuel cells (PEFCs) are reported. PEDOT-PSSA support helps Pt particles to be uniformly distributed on to the electrodes, and facilitates mixed electronic and ionic (H+-ion) conduction within the catalyst, ameliorating Pt utilization. The inherent proton conductivity of PEDOT-PSSA composite also helps reducing Nation content in PEFC electrodes. During prolonged operation of PEFCs, Pt electrodes supported onto PEDOT-PSSA composite exhibit lower corrosion in relation to Pt electrodes supported onto commercially available Vulcan XC-72R carbon. Physical properties of PEDOT-PSSA composite have been characterized by X-ray diffraction, Fourier transform infrared spectroscopy, scanning electron microscopy and transmission electron microscopy. PEFCs with PEDOT-PSSA-supported Pt catalyst electrodes offer a peak power-density of 810 mW cm(-2) at a load current-density of 1800 mA cm(-2) with Nation content as low as 5 wt.% in the catalyst layer. Accordingly, the present study provides a novel alternative support for platinized PEFC electrodes.

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Poly (3,4-ethylenedioxythiophene) (PEDOT) and poly (styrene sulphonic acid) (PSSA) supported platinum (Pt) electrodes for application in polymer electrolyte fuel cells (PEFCs) are reported. PEDOT-PSSA support helps Pt particles to be uniformly distributed on to the electrodes, and facilitates mixed electronic and ionic (H+-ion) conduction within the catalyst, ameliorating Pt utilization. The inherent proton conductivity of PEDOT-PSSA composite also helps reducing Nation content in PEFC electrodes. During prolonged operation of PEFCs, Pt electrodes supported onto PEDOT-PSSA composite exhibit lower corrosion in relation to Pt electrodes supported onto commercially available Vulcan XC-72R carbon. Physical properties of PEDOT-PSSA composite have been characterized by X-ray diffraction, Fourier transform infrared spectroscopy, scanning electron microscopy and transmission electron microscopy. PEFCs with PEDOT-PSSA-supported Pt catalyst electrodes offer a peak power-density of 810 mW cm(-2) at a load current-density of 1800 mA cm(-2) with Nation content as low as 5 wt.% in the catalyst layer. Accordingly, the present study provides a novel alternative support for platinized PEFC electrodes

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We demonstrate a top-gated field effect transistor made of a reduced graphene oxide (RGO) monolayer (graphene) by dielectrophoresis. The Raman spectrum of RGO flakes of typical size of 5 mu m x 5 mu m shows a single 2D band at 2687 cm(-1), characteristic of single-layer graphene.The two-probe current-voltage measurements of RGO flakes, deposited in between the patterned electrodes with a gap of 2.5 mu m using ac dielectrophoresis, show ohmic behavior with a resistance of similar to 37 k Omega. The temperature dependence of the resistance (R) of RGO measured between 305 K and 393 K yields a temperature coefficient of resistance [dR/dT]/R similar to -9.5 x 10(-4)/K, the same as that of mechanically exfoliated single-layer graphene. The field-effect transistor action was obtained by electrochemical top-gating using a solid polymer electrolyte (PEO + LiClO4) and Pt wire. The ambipolar nature of graphene flakes is observed up to a doping level of similar to 6 x 10(12)/cm(2) and carrier mobility of similar to 50 cm(2)/V s. The source-drain current characteristics show a tendency of current saturation at high source-drain voltage which is analyzed quantitatively by a diffusive transport model. (C) 2010 Elsevier Ltd. All rights reserved.

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For the first time, the impact of energy quantisation in single electron transistor (SET) island on the performance of hybrid complementary metal oxide semiconductor (CMOS)-SET transistor circuits has been studied. It has been shown through simple analytical models that energy quantisation primarily increases the Coulomb Blockade area and Coulomb Blockade oscillation periodicity of the SET device and thus influences the performance of hybrid CMOS-SET circuits. A novel computer aided design (CAD) framework has been developed for hybrid CMOS-SET co-simulation, which uses Monte Carlo (MC) simulator for SET devices along with conventional SPICE for metal oxide semiconductor devices. Using this co-simulation framework, the effects of energy quantisation have been studied for some hybrid circuits, namely, SETMOS, multiband voltage filter and multiple valued logic circuits. Although energy quantisation immensely deteriorates the performance of the hybrid circuits, it has been shown that the performance degradation because of energy quantisation can be compensated by properly tuning the bias current of the current-biased SET devices within the hybrid CMOS-SET circuits. Although this study is primarily done by exhaustive MC simulation, effort has also been put to develop first-order compact model for SET that includes energy quantisation effects. Finally, it has been demonstrated that one can predict the SET behaviour under energy quantisation with reasonable accuracy by slightly modifying the existing SET compact models that are valid for metallic devices having continuous energy states.

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The equivalent circuit parameters for a pentacene organic field-effect transistor are determined from low frequency impedance measurements in the dark as well as under light illumination. The source-drain channel impedance parameters are obtained from Bode plot analysis and the deviations at low frequency are mainly due to the contact impedance. The charge accumulation at organic semiconductor-metal interface and dielectric-semiconductor interface is monitored from the response to light as an additional parameter to find out the contributions arising from photovoltaic and photoconductive effects. The shift in threshold voltage is due to the accumulation of photogenerated carriers under source-drain electrodes and at dielectric-semiconductor interface, and also this dominates the carrier transport. The charge carrier trapping at various interfaces and in the semiconductor is estimated from the dc and ac impedance measurements under illumination. (c) 2010 American Institute of Physics. doi: 10.1063/1.3517085]

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In this paper, a physically based analytical quantum linear threshold voltage model for short channel quad gate MOSFETs is developed. The proposed model, which is suitable for circuit simulation, is based on the analytical solution of 3-D Poisson and 2-D Schrodinger equation. Proposed model is fully validated against the professional numerical device simulator for a wide range of device geometries and also used to analyze the effect of geometry variation on the threshold voltage.