Generation of Minimum Leakage Input Vectors with Constrained NBTI Degradation

Technology scaling has caused Negative Bias Temperature Instability (NBTI) to emerge as a major circuit reliability concern. Simultaneously leakage power is becoming a greater fraction of the total power dissipated by logic circuits. As both NBTI and leakage power are highly dependent on vectors applied at the circuit’s inputs, they can be minimized by applying carefully chosen input vectors during periods when the circuit is in standby or idle mode. Unfortunately input vectors that minimize leakage power are not the ones that minimize NBTI degradation, so there is a need for a methodology to generate input vectors that minimize both of these variables.This paper proposes such a systematic methodology for the generation of input vectors which minimize leakage power under the constraint that NBTI degradation does not exceed a specified limit. These input vectors can be applied at the primary inputs of a circuit when it is in standby/idle mode and are such that the gates dissipate only a small amount of leakage power and also allow a large majority of the transistors on critical paths to be in the “recovery” phase of NBTI degradation. The advantage of this methodology is that allowing circuit designers to constrain NBTI degradation to below a specified limit enables tighter guardbanding, increasing performance. Our methodology guarantees that the generated input vector dissipates the least leakage power among all the input vectors that satisfy the degradation constraint. We formulate the problem as a zero-one integer linear program and show that this formulation produces input vectors whose leakage power is within 1% of a minimum leakage vector selected by a search algorithm and simultaneously reduces NBTI by about 5.75% of maximum circuit delay as compared to the worst case NBTI degradation. Our paper also proposes two new algorithms for the identification of circuit paths that are affected the most by NBTI degradation. The number of such paths identified by our algorithms are an order of magnitude fewer than previously proposed heuristics.

An improved sapce phasor based current hysteresis controller with reduced switching frequency variations using variable parabolic bands

A current error space phasor based simple hysteresis controller is proposed in this paper to control the switching frequency variation in two-level pulsewidth-modulation (PWM) inverter-fed induction motor (IM) drives. A parabolic boundary for the current error space phasor is suggested for the first time to obtain the switching frequency spectrum for output voltage with hysteresis controller similar to the constant switching frequency voltage-controlled space vector PWM-based IM drive. A novel concept of online variation of this parabolic boundary, which depends on the operating speed of motor, is presented. A generalized technique that determines the set of unique parabolic boundaries for a two-level inverter feeding any given induction motor is described. The sector change logic is self-adaptive and is capable of taking the drive up to the six-step mode if needed. Steady-state and transient performance of proposed controller is experimentally verified on a 3.7-kW IM drive in the entire speed range. Close resemblance of the simulation and experimental results is shown.

Process Variation Aware Estimation of Static Leakage Power in Nano-CMOS

We present a statistical methodology for leakage power estimation, due to subthreshold and gate tunneling leakage, in the presence of process variations, for 65 nm CMOS. The circuit leakage power variations is analyzed by Monte Carlo (MC) simulations, by characterizing NAND gate library. A statistical “hybrid model” is proposed, to extend this methodology to a generic library. We demonstrate that hybrid model based statistical design results in up to 95% improvement in the prediction of worst to best corner leakage spread, with an error of less than 0.5%, with respect to worst case design.

Modeling the Field Emission Current Fluctuation in Carbon Nanotube Thin Films

Owing to their distinct properties, carbon nanotubes (CNTs) have emerged as promising candidate for field emission devices. It has been found experimentally that the results related to the field emission performance show variability. The design of an efficient field emitting device requires the analysis of the variabilities with a systematic and multiphysics based modeling approach. In this paper, we develop a model of randomly oriented CNTs in a thin film by coupling the field emission phenomena, the electron-phonon transport and the mechanics of single isolated CNT. A computational scheme is developed by which the states of CNTs are updated in time incremental manner. The device current is calculated by using Fowler-Nordheim equation for field emission to study the performance at the device scale.

Steady-State Stability of Current-Mode Active-Clamp ZVS DC-DC Converters

Active-clamp dc-dc converters are pulsewidth-modulated converters having two switches featuring zero-voltage switching at frequencies beyond 100 kHz. Generalized equivalent circuits valid for steady-state and dynamic performance have been proposed for the family of active-clamp converters. The active-clamp converter is analyzed for its dynamic behavior under current control in this paper. The steady-state stability analysis is presented. On account of the lossless damping inherent in the active-clamp converters, it appears that the stability region in the current-controlled active-clamp converters get extended for duty ratios, a little greater than 0.5 unlike in conventional hard-switched converters. The conventional graphical approach fails to assess the stability of current-controlled active-clamp converters, due to the coupling between the filter inductor current and resonant inductor current. An analysis that takes into account the presence of the resonant elements is presented to establish the condition for stability. This method correctly predicts the stability of the current-controlled active-clamp converters. A simple expression for the maximum duty cycle for subharmonic-free operation is obtained. The results are verified experimentally.

Extrinsic Analog Synthesis using Piecewise Linear Current-Mode Circuits

A methodology is presented for the synthesis of analog circuits using piecewise linear (PWL) approximations. The function to be synthesized is divided into PWL segments such that each segment can be realized using elementary MOS current-mode programmable-gain circuits. A number of these elementary current-mode circuits when connected in parallel, it is possible to realize piecewise linear approximation of any arbitrary analog function with in the allowed approximation error bounds. Simulation results show a close agreement between the desired function and the synthesized output. The number of PWL segments used for approximation and hence the circuit area is determined by the required accuracy and the smoothness of the resulting function.

Compiler Assisted Leakage Energy Optimization for Clustered VLIW Architectures

Miniaturization of devices and the ensuing decrease in the threshold voltage has led to a substantial increase in the leakage component of the total processor energy consumption. Relatively simpler issue logic and the presence of a large number of function units in the VLIW and the clustered VLIW architectures attribute a large fraction of this leakage energy consumption in the functional units. However, functional units are not fully utilized in the VLIW architectures because of the inherent variations in the ILP of the programs. This underutilization is even more pronounced in the context of clustered VLIW architectures because of the contentions for the limited number of slow intercluster communication channels which lead to many short idle cycles.In the past, some architectural schemes have been proposed to obtain leakage energy bene .ts by aggressively exploiting the idleness of functional units. However, presence of many short idle cycles cause frequent transitions from the active mode to the sleep mode and vice-versa and adversely a ffects the energy benefits of a purely hardware based scheme. In this paper, we propose and evaluate a compiler instruction scheduling algorithm that assist such a hardware based scheme in the context of VLIW and clustered VLIW architectures. The proposed scheme exploits the scheduling slacks of instructions to orchestrate the functional unit mapping with the objective of reducing the number of transitions in functional units thereby keeping them off for a longer duration. The proposed compiler-assisted scheme obtains a further 12% reduction of energy consumption of functional units with negligible performance degradation over a hardware-only scheme for a VLIW architecture. The benefits are 15% and 17% in the context of a 2-clustered and a 4-clustered VLIW architecture respectively. Our test bed uses the Trimaran compiler infrastructure.

Current views on microscopic thermodynamics of liquid alloys

An attempt has been made to review current information on the microscopic thermodynamics of liquid alloys. For complex alloys, and for alloys of simple metals with strong "compound-forming" tendencies, the fluctuation approach developed by Bhatia and his co-workers provides a useful link between the fluctuation in concentration and number density of atoms in the mixture on the one hand, and macroscopic thermodynamic properties on the other. Some selected examples of the application of structural data of liquid alloys to estimating macroscopic thermodynamic properties such as the Gibbs free energy of mixing, coupled with the fluctuation approach are given. The relevant thermodynamic quantities such as vapor pressure and entropy are also discussed, to facilitate the understanding of the present status of the fundamental and powerful links between macroscopic and microscopic (atomic scale) structure of liquid alloys (Mg--Sn, Li--Pb, Hg--K). 63 ref.--AA

Alternating current conduction behavior of excimer laser ablated SrBi2Nb2O9 thin films

Bi-layered Aurivillius compounds prove to be efficient candidates of nonvolatile memories. SrBi2Nb2O9 thin films were deposited by excimer laser ablation at low substrate temperature (400 °C) followed by an ex situ annealing at 750 °C. The polarization hysteresis behavior was confirmed by variation of polarization with the external applied electric field and also verified with capacitance versus voltage characteristics. The measured values of spontaneous and remnant polarizations were, respectively, 9 and 6 μC/cm2 with a coercive field of 90 kV/cm. The measured dielectric constant and dissipation factors at 100 kHz were 220 and 0.02, respectively. The frequency analysis of dielectric and ac conduction properties showed a distribution of relaxation times due to the presence of multiple grain boundaries in the films. The values of activation energies from the dissipation factor and grain interior resistance were found to be 0.9 and 1.3 eV, respectively. The deviation in these values was attributed to the energetic conditions of the grain boundaries and bulk grains. The macroscopic relaxation phenomenon is controlled by the higher resistive component in a film, such as grain boundaries at lower temperatures, which was highlighted in the present article in close relation to interior grain relaxation and conduction properties.

Colossal electroresistance and current induced switching in ferromagnetic insulating state of La0.82Ca0.18MnO3

Colossal electroresistance and current induced resistivity switching have been measured in the ferromagnetic insulating (FMI) state of single crystal manganite La0.82Ca0.18MnO3. The sample has a Curie transition temperature TC = 165 K and the FMI state is realized for temperatures T<100 K. The electroresistance (ER), arising from a strong nonlinear resistivity, attains a large value ( ≈ 100%) in the FMI state. However, this is accompanied by a collapse of the magnetoresistance (MR) to a small value even in magnetic field (H) of 10 T. This demonstrates that the mechanisms that give rise to ER and MR are effectively decoupled.

Current‐limiting action of mixed‐phase BaTiO3 ceramic semiconductors

Stable and highly reproducible current‐limiting characteristics are observed for polycrystalline ceramics prepared by sintering mixtures of coarse‐grained, donor‐doped BaTiO3 (tetragonal) as the major phase and ultrafine, undoped cubic perovskite such as BaSnO3, BaZrO 3, SrTiO3, or BaTiO3 (cubic). The linear current‐voltage (I‐V) relation changes over to current limiting as the field strength increases, when thermal equilibrium is attained. The grain‐boundary layers with low donor and high Sn, Zr, or Sr have depleted charge carrier density as compared to that in the grain bulk. The voltage drop at the grain‐boundary layers diminishes the temperature gradient between the interior and surface regions.