Laser drilling improving circuit board manufacturing

We reported here a novel technique for laser high speed drillings on Printed Circuit Boards (PCBs). A CNC solid laser based system is developed to drill through and blind vias as an alternative to mechanical drilling. The system employs an Acousto-Optic Q-switched Nd: YAG laser, a computer control system and an X-Y moving table which can handle up to 400 x 400 mm PCB. With a special designed cavity the laser system works in a pulsed operation in order to generate pulses with width down to 0.5 mu s and maximum peak power over 10kW at 10k repetition rate. Delivered by an improved optical beam transforming system, the focused laser beam can drill hobs including blind vias on PCBs with diameter in the range of 0.1 - 0.4 mm and at up to 300 - 500 vias per second (depending on the construction of PCBs). By means of a CNC X-Y moving system, laser pulses with pulse-to-pulse superior repeatability can be fired at desired location on a PCBs with high accuracy. This alternative technology for drilling through or blind vias on PCBs or PWBs (printed wiring boards) will obviously enhance the capability to printed boards manufacturing.

印刷线路板废弃物的热解与动力学实验研究

分别应用管式炉反应器和热重分析手段对印刷线路板废弃物的热解行为和热解动力学进行了实验研究。在管式炉中，研究不同的热解温度：700～950℃，对产物分布和气体成分分布的影响。实验结果表明：PCB热解气体的主要成分是H2和CO2，气体的热值较低，仅为2.09～5.41MJ/m^3，PCB不适合以气体产物为目标的能源利用方式。应用Friedman方法对PCB的热解动力学进行了研究，求得PCB的热解动力学参数分别是：表观活化能190.92kJ/mol，反应级数5.97，指前因子lnA47.14min^-1。

Thermal-mechanical interface crack behaviour of a surface mount solder joint

The effect of thermal-mechanical loading on a surface mount assembly with interface cracks between the solder and the resistor and between the solder and the printed circuit board (PCB) was studied using a non-linear thermal finite element analysis. The thermal effect was taken as cooling from the solder eutectic temperature to room temperature. Mechanical loading at the ends of the PCB was also applied. The results showed that cooling had the effect of causing large residual shear displacement at the region near the interface cracks. The mechanical loading caused additional crack opening displacements. The analysis on the values of J-integral for the interface cracks showed that J-integral was approximately path independent, and that the effect of crack at the solder/PCB interface is much more serious than that between the component and solder.

VCSEL-based parallel optical transmission module

This paper describes the design process and performance of the optimized parallel optical transmission module. Based on 1x12 VCSEL (Vertical Cavity Surface Emitting Laser) array, we designed and fabricated the high speed parallel optical modules. Our parallel optical module contains a 1x12 VCSEL array, a 12 channel CMOS laser driver circuit, a high speed PCB (Printed Circuit Board), a MT fiber connector and a packaging housing. The L-I-V characteristics of the 850nm VCSEL was measured at the operating current 8mA, 3dB frequency bandwidth more than 3GHz and the optical output 1mW. The transmission rate of all 12 channels is 30Gbit/s, with a single channel 2.5Gbit/s. By adopting the integration of the 1x12 VCSEL array and the driver array, we make a high speed PCB (Printed Circuit Board) to provide the optoelectronic chip with the operating voltage and high speed signals current. The LVDS (Low-Voltage Differential Signals) was set as the input signal to achieve better high frequency performance. The active coupling was adopted with a MT connector (8 degrees slant fiber array). We used the Small Form Factor Pluggable (SFP) packaging. With the edge connector, the module could be inserted into the system dispense with bonding process.

Simulation of micromegas detector by garfield program

In this paper, a batch file which describes the detailed structure and the corresponding physical process of Micro-Mesh Gaseous Structure (Micromegas) detector, the macro commands and the control structures based on the Garfield program has been developed. And using the Garfield program controlled by this batch file, the detector's gain and spatial resolution have been investigated under different conditions. These results obtained by the simulation program not only exhibit the influences of the mesh and drift voltage, the mixture gas proportion, the distance between the mesh cathode and the printed circuit board readout anode, and the Lines Per Inch of the mesh cathode on the gain and spatial resolution of the detector, but also are very important to optimize the design, shorten the experimental period, and save cost during the detector development. Additionally, they also indicate that the Garfield program is a powerful tool for the Micromegas detector design and optimization.

基于DSP的烟支重量控制系统的设计

本文介绍了对Passim8K型卷烟机重量控制系统的改造。采用TI公司的TMS320LF2812DSP作为中央处理器,实现了烟支的在线重量检测和控制,并增加了烟支紧头跟踪功能。改造后的重量控制系统检测精度高,体积小,性能稳定,运行可靠。

Mini-electrochemical detector for microchip electrophoresis

This paper presents the development of a mini-electrochemical detector for microchip electrophoresis. The small size (3.6 x 5.0 cm(2), W x L) of the detector is compatible with the dimension of the microchip. The use of universal serial bus (USB) ports facilitates installation and use of the detector, miniaturizes the detector, and makes it ideal for lab-on-a-chip applications. A fixed 10 M Omega feedback resistance was chosen to convert current of the working electrode to voltage with second gain of 1, 2, 4, 8, 16, 32, 64 and 128 for small signal detection instead of adopting selectable feedback resistance. Special attention has been paid to the power support circuitry and printed circuit board (PCB) design in order to obtain good performance in such a miniature size. The working electrode potential could be varied over a range of +/-2.5 V with a resolution of 0.01 mV. The detection current ranges from -0.3 x 10(-7) A to 2.5 x 10(-7) A and the noise is lower than 1 pA. The analytical performance of the new system was demonstrated by the detection of epinephrine using an integrated PDMS/glass microchip with detection limit of 2.1 mu M (S/N = 3).

Synchronization of modified Chua's circuit with x vertical bar x vertical bar function

This paper considers the chaos synchronization of the modified Chua's circuit with x vertical bar x vertical bar function. We firstly show that a couple of the modified Chua systems with different parameters and initial conditions can be synchronized using active control when the values of parameters both in drive system and response system are known aforehand. Furthermore, based on Lyapunov stability theory we propose an adaptive active control approach to make the states of two identical Chua systems with unknown constant parameters asymptotically synchronized. Moreover the designed controller is independent of those unknown parameters. Numerical simulations are given to validate the proposed synchronization approach.

Reversible disconnection of the hippocampal-prelimbic cortical circuit impairs spatial learning but not passive avoidance learning in rats

Wistar rats, treated with the GABA(A) receptor agonist muscimol, were used to investigate the role of the hippocampal-prelimbic cortical (Hip-PLC) circuit in spatial learning in the Morris water maze task, and in passive avoidance learning in the step-thr

Compact Reconfigurable Binary-Decision-Diagram Logic Circuit on a GaAs Nanowire Network

We describe a reconfigurable binary-decision-diagram logic circuit based on Shannon's expansion of Boolean logic function and its graphical representation on a semiconductor nanowire network. The circuit is reconfigured by using programmable switches that electrically connect and disconnect a small number of branches. This circuit has a compact structure with a small number of devices compared with the conventional look-up table architecture. A variable Boolean logic circuit was fabricated on an etched GaAs nanowire network having hexagonal topology with Schottky wrap gates and SiN-based programmable switches, and its correct logic operation together with dynamic reconfiguration was demonstrated.

Small-Signal Equivalent-Circuit Model and Characterization of 1.55-mu m Buried Tunnel Junction Vertical-Cavity Surface-Emitting Lasers

The work was supported in part by the National Natural Science Foundation of China under Grant 60536010, Grant 60606019, Grant 60777029, and Grant 60820106004, and in part by the National Basic Research Program of China under Grant 2006CB604902, Grant 2006CB302806, and Grant 2006dfa11880.

Rate-equation-based circuit model of high-speed semiconductor lasers

Based oil rare equations of semiconductor laser, a symbolically-defined model for optical transmission system performance evaluation and network characterization in both time- and frequency domains is presented. The steady-state and small-signal characteristics, such as current-photon density curve, current-voltage curve, and input impedance, call be predicted from this model. Two important dynamic characteristics, second-order harmonic distortion and two-tone third-order intermodulation products, are evaluated under different driving conditions. Experiments show that the simulated results agree well with the published data. (c) 2007 Wiley Periodicals, Inc.

A small signal equivalent circuit model for resonant tunnelling diode

We report a resonant tunneling diode (RTD) small signal equivalent circuit model consisting of quantum capacitance and quantum inductance. The model is verified through the actual InAs/In0.53Ga0.47As/AlAs RTD fabricated on an InP substrate. Model parameters are extracted by fitting the equivalent circuit model with ac measurement data in three different regions of RTD current-voltage (I-V) characteristics. The electron lifetime, representing the average time that the carriers remain in the quasibound states during the tunneling process, is also calculated to be 2.09 ps.

A novel fast lock-in phase-locked loop frequency synthesizer with direct frequency presetting circuit

This paper proposes a novel, fast lock-in, phase-locked loop (PLL) frequency synthesizer. The synthesizer includes a novel mixed-signal voltage-controlled oscillator (VCO) with a direct frequency presetting circuit. The frequency presetting circuit can greatly speed up the lock-in process by accurately the presetting oscillation frequency of the VCO. We fully integrated the synthesizer in standard 0.35 mu m, 3.3 V complementary metal-oxide-semiconductors (CMOS) process. The entire chip area is only 0.4 mm(2). The measured results demonstrate that the synthesizer can speed up the lock-in process significantly and the lock-in time is less than 10 mu s over the entire oscillation frequency range. The measured phase noise of the synthesizer is -85 dBc/Hz at 10 kHz offset. The synthesizer avoids the tradeoff between the lock-in speed and the phase noise/spurs. The synthesizer monitors the chip temperature and automatically compensates for the variation in frequency with temperature.