51 resultados para inductive logic programming

em Chinese Academy of Sciences Institutional Repositories Grid Portal


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The State Key Laboratory of Computer Science (SKLCS) is committed to basic research in computer science and software engineering. The research topics of the laboratory include: concurrency theory, theory and algorithms for real-time systems, formal specifications based on context-free grammars, semantics of programming languages, model checking, automated reasoning, logic programming, software testing, software process improvement, middleware technology, parallel algorithms and parallel software, computer graphics and human-computer interaction. This paper describes these topics in some detail and summarizes some results obtained in recent years.

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A time averaged two-dimensional fluid model including an electromagnetic module with self-consistent power deposition was developed to simulate the transport of a low pressure radio frequency inductively coupled plasma source. Comparsions with experiment and previous simulation results show, that the fluid model is feasible in a certain range of gas pressure. In addition, the effects of gas pressure and power input have been discussed.

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On the basis of signed-digit negabinary representation, parallel two-step addition and one-step subtraction can be performed for arbitrary-length negabinary operands.; The arithmetic is realized by signed logic operations and optically implemented by spatial encoding and decoding techniques. The proposed algorithm and optical system are simple, reliable, and practicable, and they have the property of parallel processing of two-dimensional data. This leads to an efficient design for the optical arithmetic and logic unit. (C) 1997 Optical Society of America.

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A compact two-step modified-signed-digit arithmetic-logic array processor is proposed. When the reference digits are programmed, both addition and subtraction can be performed by the same binary logic operations regardless of the sign of the input digits. The optical implementation and experimental demonstration with an electron-trapping device are shown. Each digit is encoded by a single pixel, and no polarization is included. Any combinational logic can be easily performed without optoelectronic and electro-optic conversions of the intermediate results. The system is compact, general purpose, simple to align, and has a high signal-to-noise ratio. (C) 1999 Optical Society of America.

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A more powerful tool for binary image processing, i.e., logic-operated mathematical morphology (LOMM), is proposed. With LOMM the image and the structuring element (SE) are treated as binary logical variables, and the MULTIPLY between the image and the SE in correlation is replaced with 16 logical operations. A total of 12 LOMM operations are obtained. The optical implementation of LOMM is described. The application of LOMM and its experimental results are also presented. (C) 1999 Optical Society of America.

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A novel, to our knowledge, two-step digit-set-restricted modified signed-digit (MSD) addition-subtraction algorithm is proposed. With the introduction of the reference digits, the operand words are mapped into an intermediate carry word with all digits restricted to the set {(1) over bar, 0} and an intermediate sum word with all digits restricted to the set {0, 1}, which can be summed to form the final result without carry generation. The operation can be performed in parallel by use of binary logic. An optical system that utilizes an electron-trapping device is suggested for accomplishing the required binary logic operations. By programming of the illumination of data arrays, any complex logic operations of multiple variables can be realized without additional temporal latency of the intermediate results. This technique has a high space-bandwidth product and signal-to-noise ratio. The main structure can be stacked to construct a compact optoelectronic MSD adder-subtracter. (C) 1999 Optical Society of America.

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Negabinary is a component of the positional number system. A complete set of negabinary arithmetic operations are presented, including the basic addition/subtraction logic, the two-step carry-free addition/subtraction algorithm based on negabinary signed-digit (NSD) representation, parallel multiplication, and the fast conversion from NSD to the normal negabinary in the carry-look-ahead mode. All the arithmetic operations can be performed with binary logic. By programming the binary reference bits, addition and subtraction can be realized in parallel with the same binary logic functions. This offers a technique to perform space-variant arithmetic-logic functions with space-invariant instructions. Multiplication can be performed in the tree structure and it is simpler than the modified signed-digit (MSD) counterpart. The parallelism of the algorithms is very suitable for optical implementation. Correspondingly, a general-purpose optical logic system using an electron trapping device is suggested. Various complex logic functions can be performed by programming the illumination of the data arrays without additional temporal latency of the intermediate results. The system can be compact. These properties make the proposed negabinary arithmetic-logic system a strong candidate for future applications in digital optical computing with the development of smart pixel arrays. (C) 1999 Society of Photo-Optical Instrumentation Engineers. [S0091-3286(99)00803-X].

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We present, for the first time to our knowledge, a generalized lookahead logic algorithm for number conversion from signed-digit to complement representation. By properly encoding the signed-digits, all the operations are performed by binary logic, and unified logical expressions can be obtained for conversion from modified-signed-digit (MSD) to 2's complement, trinary signed-digit (TSD) to 3's complement, and quarternary signed-digit (QSD) to 4's complement. For optical implementation, a parallel logical array module using an electron-trapping device is employed and experimental results are shown. This optical module is suitable for implementing complex logic functions in the form of the sum of the product. The algorithm and architecture are compatible with a general-purpose optoelectronic computing system. (C) 2001 Society of Photo-Optical Instrumentation Engineers.

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The double-stranded RNA (dsRNA)-dependent protein kinase (PKR) belongs to the eIF2 alpha kinase family and plays a critical role in interferon (IFN)-mediated antiviral response. Recently, in Japanese flounder (Paralichthys olivaceus), a PKR gene has been identified. In this study, we showed that PoPKR localized to the cytoplasm, and the dsRNA-binding motifs (dsRBMs) played a determinative role in protein localization. In cultured FEC cells, PoPKR was detected at a low level of constitutive expression but was highly induced after treatment with UV-inactivated grass carp hemorrhagic virus, active SMRV and Poly I:C although with different expression kinetics. In flounder, PoPKR was ubiquitously distributed in all tested tissues, and SMRV infection resulted in significant upregulation at mRNA and protein levels. In order to reveal the role of PoPKR in host antiviral response, its expression upon exposure to various inducers was characterized and further compared with that of PoHRI, which is another eIF2 alpha kinase of flounder. Interestingly, expression comparison revealed that all inducers stimulated upregulation of PoHRI in cultured flounder embryonic cells and fish, with a similar kinetics to PoPKR but to a less extent. These results suggest that, during antiviral immune response, both flounder eIF2 alpha kinases might play similar roles and that PoPKR is the predominant kinase. (C) 2009 National Natural Science Foundation of China and Chinese Academy of Sciences. Published by Elsevier Limited and Science in China Press. All rights reserved.

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Heme oxygenase-1 is the rate-limiting enzyme in the degradation of heme into biliverdin, carbon monoxide and free divalent iron. In this study, we cloned heme oxygenase isoform 1 (CaHO-1) from a hypoxia-tolerant teleost fish Carassius auratus. The full-length cDNA of CaHO-1 is 1247 bp and encodes a protein of 272 amino acids. RT-PCR and real-time PCR analysis indicated that CaHO-1 was predominantly transcribed in posterior kidney, head kidney, gill and intestine, and induction of gene transcription was observed predominantly in posterior kidney under hypoxic stress. Moreover, the hypoxia-induced transcription was confirmed in goldfish larvae and in in vitro cultured CAB cells. Fluorescence of the HO-1-GFP fusion protein revealed a cytoplasmic and plasma membrane localization, which was consistent with the putative transmembrane structure. Subsequently, we established a stably transfected CAB/pcDNA3.1-HO-1 cell line and a control CAB/pcDNA3.1 cell line, and found that the number of dead cells was obviously reduced in the pcDNA3.1-HO-1-transfected group following 4 days of hypoxic (1% O-2) treatment in comparison with numerous detached dead cells in the control pcDNA3.1-transfected cells. Furthermore, a significant cell viability difference between the two kinds of transfected cells during hypoxia-reoxygenation was revealed. Therefore, the data suggest that fish HO-1 might play a significant protective role in cells in response to hypoxic stress.

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Protein arginine methyltransferase 1 (PRMT1) is currently thought as an effector to regulate interferon (IFN) signalling. Here Paralichthys olivaceus PRMT1 (PoPRMT1) gene was identified as a vitally induced gene from UV-inactivated Scophthalmus maximus Rhabdovirus (SMRV)-infected flounder embryonic cells (FEC). PoPMRT1 encodes a 341-amino-acid protein that shares the conserved domains including post-I, motif I, II and III. Homology comparisons show that the putative PoPMRT1 protein is the closest to zebrafish PMRT1 and belongs to type I PRMT family (including PRMT1, PRMT2, PRMT3, PRMT4, PRMT6, PRMT8). Expression analyses revealed an extensive distribution of PoPMRT1 in all tested tissues of flounder. In vitro induction of PoPRMT1 was determined in UV-inactivated SMRV-infected FEC cells, and under the same conditions, flounder Mx wash also transcriptionally up-regulated, indicating that an IFN response might be triggered. Additionally, live SMRV infection of flounders induced an increased expression of PoPRMT1 mRNA and protein significantly in spleen, and to a lesser extent in head kidney and intestine. Immunofluorescence analysis revealed a major cyptoplasmic distribution of PoPRMT1 in normal FEC but an obvious increase occurred in nucleus in response to UV-inactivated SMRV. This is the first report on in vitro and in vivo expression of fish PRMT1 by virus infection, suggesting that PoPRMT1 might be implicated in flounder antiviral immune response. (c) 2006 Elsevier Ltd. All rights reserved.

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Pigment epithelium-derived factor (PEDF) is acknowledged to be a non-inhibitory member of the serine protease inhibitor (serpin) superfamily, with antiangiogenesis, and neuroprotective and immumoregulatory function, mainly in the tissues of nervous system. Here, A PEDF gene homolog, Paralichthys olivaceus PEDF (PoPEDF), was isolated from flounder embryonic cells (FEC) treated with UV-inactivated Grass carp hemorrhage virus (GCHV) and subsequently identified as a differentially expressed gene. The full length of PoPEDF cDNA is 1803 bp with an open reading frame of 1212 bp encoding a 403-amino-acid protein. This deduced protein contains an N-terminal signal peptide, a glycosylation site, a consensus serpin motif, and a 34-mer and a 44-mer fragment, all of which are very conserved in the PEDF family. PoPEDF gene exhibits a conserved exon-intron arrangement with 8 exons and 7 introns. This conserved evolutionary relationship was further confirmed by a phylogenetic analysis, where fish PEDFs and mammalian members formed a well-supported clade. Constitutive expression of PoPEDF was widely detected in many tissues. In response to UV-inactivated GCHV or poly(I:C), PEDF mRNA was upregulated in FEC cells with time. This is the first report on the transcriptional induction of PEDF in virally infected cells. (C) 2005 Elsevier Inc. All rights reserved.

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We describe a reconfigurable binary-decision-diagram logic circuit based on Shannon's expansion of Boolean logic function and its graphical representation on a semiconductor nanowire network. The circuit is reconfigured by using programmable switches that electrically connect and disconnect a small number of branches. This circuit has a compact structure with a small number of devices compared with the conventional look-up table architecture. A variable Boolean logic circuit was fabricated on an etched GaAs nanowire network having hexagonal topology with Schottky wrap gates and SiN-based programmable switches, and its correct logic operation together with dynamic reconfiguration was demonstrated.

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This paper proposes smart universal multiple-valued (MV) logic gates by transferring single electrons (SEs). The logic gates are based on MOSFET based SE turnstiles that can accurately transfer SEs with high speed at high temperature. The number of electrons transferred per cycle by the SE turnstile is a quantized function of its gate voltage, and this characteristic is fully exploited to compactly finish MV logic operations. First, we build arbitrary MV literal gates by using pairs of SE turnstiles. Then, we propose universal MV logic-to-value conversion gates and MV analog-digital conversion circuits. We propose a SPICE model to describe the behavior of the MOSFET based SE turnstile. We simulate the performances of the proposed gates. The MV logic gates have small number of transistors and low power dissipations.

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This paper proposes novel universal logic gates using the current quantization characteristics of nanodevices. In nanodevices like the electron waveguide (EW) and single-electron (SE) turnstile, the channel current is a staircase quantized function of its control voltage. We use this unique characteristic to compactly realize Boolean functions. First we present the concept of the periodic-threshold threshold logic gate (PTTG), and we build a compact PTTG using EW and SE turnstiles. We show that an arbitrary three-input Boolean function can be realized with a single PTTG, and an arbitrary four-input Boolean function can be realized by using two PTTGs. We then use one PTTG to build a universal programmable two-input logic gate which can be used to realize all two-input Boolean functions. We also build a programmable three-input logic gate by using one PTTG. Compared with linear threshold logic gates, with the PTTG one can build digital circuits more compactly. The proposed PTTGs are promising for future smart nanoscale digital system use.