7 resultados para VGA

em Chinese Academy of Sciences Institutional Repositories Grid Portal


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This paper presents experimental results of an analog baseband circuit for China Multimedia Mobile Broadcasting (CMMB) direct conversion receiver in 0.35um SiGe BiCMOS process. It is the first baseband of CMMB RFIC reported so far. A 8(th)-order chebyshev low pass filter (LPF) with calibration system is used in the analog baseband circuit, the filter provides 0.5 dB passband ripple and -35 dB attenuation at 6MHz with the cutoff frequency at 4MHz, the calibration of filter is reported to achieve the bandwidth accuracy of 3%. The baseband variable gain amplifier (VGA) achieves more than 40 dB gain tuning with temperature compensation. In addition, A DC offset cancellation circuit is also introduced to remove the offset from layout and self-mixing, and the remaining offset voltage and current consumption are only 6mV and 412uA respectively. Implemented in a 0.35um SiGe technology with 1.1 mm(2) die size, this tuner baseband achieves OIP3 of 25.5 dBm and dissipate 16.4 mA under 2.8-V supply.

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An analog baseband circuit made in a 0.35-μm SiGe BiCMOS process is presented for China Multimedia Mobile Broadcasting (CMMB) direct conversion receivers. A high linearity 8th-order Chebyshev low pass filter (LPF) with accurate calibration system is used. Measurement results show that the filter provides 0.5-dB pass-band ripple, 4% bandwidth accuracy, and -35-dB attenuation at 6 MHz with a cutoff frequency of 4 MHz. The current steering type variable gain amplifier (VGA) achieves more than 40-dB gain range with excellent temperature compensation.This tuner baseband achieves an OIP3 of 25.5 dBm, dissipates 16.4 mA under a 2.8-V supply and occupies 1.1 mm~2 of die size.

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A 5.2 GHz variable-gain amplifier (VGA) and a power amplifier (PA) driver are designed for WLAN IEEE 802.11a monolithic RFIC. The VGA and the PA driver are implemented in a 50 GHz 0.35 μm SiGe BiCMOS technology and occupy 1.12×1.25 mm~2 die area. The VGA with effective temperature compensation is controlled by 5 bits and has a gain range of 34 dB. The PA driver with tuned loads utilizes a differential input, single-ended output topology, and the tuned loads resonate at 5.2 GHz. The maximum overall gain of the VGA and the PA driver is 29 dB with the output third-order intercept point (OIP3) of 11 dBm. The gain drift over the temperature varying from -30 to 85℃ converges within±3 dB. The total current consumption is 45 mA under a 2.85 V power supply.

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采用MOCVD技术在Si衬底(111)面上生长了GaN外延膜,分析了薄膜表面形貌和Si基GaN的临界载荷,研究了表面发光性能和GaN晶体质量随深度的变化.结果表明,外延层的表面比较平整,多组超晶格插入层可以进一步降低位错密度,提高晶体质量.膜的表面有许多颗粒状的发光中心,除了强的带边峰外,还有弱的黄光带和红光带,这可能是ON与VGa所产生的深能级跃迁产生的.GaN的晶体质量具有梯度变化,GaN外延层的上层晶体质量比较好,界面附近比较差,但是外延层与衬底的结合强度较高,临界载荷达到2.05 N.

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用正电子寿命谱和符合多普勒技术研究了电子辐照过的GaSb样品.揭示出原牛未掺杂GaSb样品中存在单空位型VGa相关缺陷,具有284ps左右的寿命值.电子辐照能使这种缺陷的浓度增大,使平均寿命值从辐照前的265Ps增大到辐照后的268ps.低温符合多普勒展宽实验结果表明退火后的电子辐照过的原生未掺杂GaSb样品中仍然存在反位缺陷Gasb.掺Zn、Te样品的实验也证实电子辐照在GaSb样品中会引入VGa,284 ps类型的缺陷.

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论述了用于兰州重离子加速器冷却存储环(HIRFL-CSR)控制系统的前端总线系统控制器的改进。改进了控制器的嵌入式操作系统和应用程序,开发了控制器和数据库交换数据的应用程序。该控制器基于BGA封装的ARM920T(ARM9)处理器和嵌入式的LINUX操作系统,可以连接标准的VGA显示器、键盘、鼠标,采用了现场可编程的FPGA器件进行背板接口设计,并具有64mA高驱动能力的总线驱动器,以及拥有灵活的接口信号定义可编程能力,是HIRFL-CSR控制系统的关键部件。

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本文论述用于兰州重离子加速器冷却存储环(HIRFL-CSR)控制系统的前端总线系统控制器FBC-01的硬件设计。该控制器是基于0.8mmBGA封装的AT91RM9200(ARM9)处理器,运行嵌入式LINUX操作系统。控制器可以连接标准的VGA显示器、键盘、鼠标,具有通用的10M/100M以太网接口、USB接口、RS-232接口、485接口、CANBUS接口。可以带SD卡、CF卡存储器。该控制器采用现场可编程的FPGA器件设计背板接口,并采用具有64mA高驱动能力的总线驱动器,不仅符合VME规范的电气要求,而且具有灵活的接口信号定义可编程能力,是HIRFL-CSR控制系统的关键部件。