VLSI architecture of a K-best detector for MIMO--OFDM wireless communication systems

The K-best detector is considered as a promising technique in the MIMO-OFDM detection because of its good performance and low complexity. In this paper, a new K-best VLSI architecture is presented. In the proposed architecture, the metric computation units (MCUs) expand each surviving path only to its partial branches, based on the novel expansion scheme, which can predetermine the branches' ascending order by their local distances. Then a distributed sorter sorts out the new K surviving paths from the expanded branches in pipelines. Compared to the conventional K-best scheme, the proposed architecture can approximately reduce fundamental operations by 50% and 75% for the 16-QAM and the 64-QAM cases, respectively, and, consequently, lower the demand on the hardware resource significantly. Simulation results prove that the proposed architecture can achieve a performance very similar to conventional K-best detectors. Hence, it is an efficient solution to the K-best detector's VLSI implementation for high-throughput MIMO-OFDM systems.

A Complex BPF with On Chip Auto-tuning Architecture for Wireless Receivers

A 3(rd) order complex band-pass filter (BPF) with auto-tuning architecture is proposed in this paper. It is implemented in 0.18um standard CMOS technology. The complex filter is centered at 4.092MHz with bandwidth of 2.4MHz. The in-band 3(rd) order harmonic input intercept point (IIP3) is larger than 16.2dBm, with 50 Omega as the source impedance. The input referred noise is about 80uV(rms). The RC tuning is based on Binary Search Algorithm (BSA) with tuning accuracy of 3%. The chip area of the tuning system is 0.28 x 0.22 mm(2), less than 1/8 of that of the main-filter which is 0.92 x 0.59 mm(2). After tuning is completed, the tuning system will be turned off automatically to save power and to avoid interference. The complex filter consumes 2.6mA with a 1.8V power supply.

An adaptive frequency synthesizer architecture reducing reference sidebands

An adaptive phase-locked loop (PLL) frequency synthesizer architecture for reducing reference sidebands at the output of the frequency synthesizer is described. The architecture combines two tuning loops: one is the main loop for locking the PLL frequency synthesizer and operating all the time, the other one is auxiliary loop for reducing reference sidebands and operating only when the main loop is closely locked. A 1.8V 1GHz fully integrated CMOS dual-loop frequency synthesizer is designed in a 0.18um CMOS process. The suppression of the reference sidebands of the proposed frequency synthesizer is 13.8dB more than that of the general frequency synthesizer.

Pipeline Architecture and Parallel Computation-Based Real-Time Stereovision Tracking System for Surgical Navigation

This paper studies the development of a real-time stereovision system to track multiple infrared markers attached to a surgical instrument. Multiple stages of pipeline in field-programmable gate array (FPGA) are developed to recognize the targets in both left and right image planes and to give each target a unique label. The pipeline architecture includes a smoothing filter, an adaptive threshold module, a connected component labeling operation, and a centroid extraction process. A parallel distortion correction method is proposed and implemented in a dual-core DSP. A suitable kinematic model is established for the moving targets, and a novel set of parallel and interactive computation mechanisms is proposed to position and track the targets, which are carried out by a cross-computation method in a dual-core DSP. The proposed tracking system can track the 3-D coordinate, velocity, and acceleration of four infrared markers with a delay of 9.18 ms. Furthermore, it is capable of tracking a maximum of 110 infrared markers without frame dropping at a frame rate of 60 f/s. The accuracy of the proposed system can reach the scale of 0.37 mm RMS along the x- and y-directions and 0.45 mm RMS along the depth direction (the depth is from 0.8 to 0.45 m). The performance of the proposed system can meet the requirements of applications such as surgical navigation, which needs high real time and accuracy capability.

Layered Architecture for Secure E-Commerce Applications

We present a layered architecture for secure e-commerce applications and protocols with fully automated dispute-resolution process, robust to communication failures and malicious faults. Our design is modular, with precise yet general-purpose interfaces and functionalities, and allows usage as an underlying secure service to different e-commerce, e-banking and other distributed systems. The interfaces support diverse, flexible and extensible payment scenarios and instruments, including direct buyer-seller payments as well as (the more common) indirect payments via payment service providers (e.g. banks). Our design is practical, efficient, and ensures reliability and security under realistic failure and delay conditions.

Molecular "Wiring" glucose oxidase in supramolecular architecture

Supramolecular organized multilayers were constructed by multiwalled carbon nanotubes modified with ferrocene-derivatized poly(allylamine) redox polymer and glucose oxidase by electrostatic self-assembly. From the analysis of voltammetric signals and fluorescence results, a linear increment of the coverage of enzyme per bilayer was estimated, which demonstrated that the multilayer is constructed in a spatially ordered manner. The cyclic voltammograms obtained from the indium tin oxide (ITO) electrodes coated by the (Fc-PAH@CNT/GOx)(n) multilayers revealed that bioelectrocatalytic response is directly correlated to the number of deposited bilayers; that is, the sensitivity is tunable by controlling the number of bilayers associated with ITO electrodes. The incorporation of redox-polymer-functionalized carbon nanotubes (CNT) into enzyme films resulted in a 6-10-fold increase in the glucose electrocatalytic current; the bimolecular rate constant of FADH(2) oxidation (wiring efficiency) was increased up to 12-fold. Impedance spectroscopy data have yielded the electron diffusion coefficient (D-e) of this nanostructure to be over 10(-8) cm(2) s(-1), which is typically higher than those systems without CNT by at least a factor of 10, indicating that electron transport in the new supramolecular architecture was enhanced by communication of the redox active site of enzyme, redox polymer, and CNT.

Anion coordination and molecular assembly in C2-substituted thiamine-anion systems: effects of the anion and molecular conformation

The compounds (het)(PtCl6)2H(2)O 1, (het)(HgI4).H2O 2 (het = 2-(alpha-hydroxyethyl)thiamine) and (hpt)(Hg2Br6) 3 (hpt = 2-(alpha-hydroxypropyl)thiamine) have been prepared and structurally characterized by X-ray crystallography in order to study the influence of the anion and molecular conformation on the formation of supramolecular architectures that adsorb anionic species. Both het and hpt molecules adopt the usual S conformation for C2-substituted thiamine but differ from the F conformation for C2-free thiamine derivatives. Two types of characteristic ligand-anion complexation are observed, being of the forms C(6')-H...anion...thiazolium-ring (in 1 and 2) and N(4'1)-H...anion...thiazolium-ring (in 3). The reaction of het with PtCl62- or HgI42- gives a 1-D double-chain in 1, consisting of two hydrogen-bonded het chains, which are cross-linked by anions through hydrogen bonding and anion...aromatic-ring interactions, or a cationic 3-D framework in 2 formed by the stacking of hydrogen-bonded sheets with anion-and-water-filled channels. In the case of 3, hydrogen-bonded hpt dimers and HgBr62- anions form alternate cation-anion columns. A comparison with the cases of C2-free thiamine-anion complexes indicates that the change in molecular conformation results in novel supramolecular assemblies in 1 and 2 and an analogous architecture in 3, which also depends on the nature of the anions.