19 resultados para Smart-RBAC
em Chinese Academy of Sciences Institutional Repositories Grid Portal
Resumo:
More and more piezoelectric materials and structures have been used for structure control in aviation and aerospace industry. More efficient and convenient computation method for large complex structure with piezoelectric actuation devices is required. A load simulation method of piezoelectric actuation is presented in this paper. By this method, the freedom degree of finite element simulation is significantly reduced, the difficulty in defining in-plane voltage for multi-layers piezoelectric composite is overcome and the transfer computation between material main direction and the element main direction is simplified. The concept of simulation load is comprehensible and suitable for engineers of structure strength in shape and vibration control, thereby is valuable for promoting the application of piezoelectric material and structures in practical aviation and aerospace fields.
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This paper proposes smart universal multiple-valued (MV) logic gates by transferring single electrons (SEs). The logic gates are based on MOSFET based SE turnstiles that can accurately transfer SEs with high speed at high temperature. The number of electrons transferred per cycle by the SE turnstile is a quantized function of its gate voltage, and this characteristic is fully exploited to compactly finish MV logic operations. First, we build arbitrary MV literal gates by using pairs of SE turnstiles. Then, we propose universal MV logic-to-value conversion gates and MV analog-digital conversion circuits. We propose a SPICE model to describe the behavior of the MOSFET based SE turnstile. We simulate the performances of the proposed gates. The MV logic gates have small number of transistors and low power dissipations.
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Hybrid integration of GaAs/AlGaAs multiple quantum well self electro-optic effect device (SEED) arrays are demonstrated flip-chip bonded directly onto 1 mu m silicon CMOS circuits. The GaAs/AlGaAs MQW devices are designed for 850 nm operation. Some devices are used as input light detectors and others serve as output light modulators. The measurement results under applied biases show good optoelectronic characteristics of elements in SEED arrays. Nearly the same reflection spectrum is obtained for the different devices at an array and the contrast ratio is more than 1.2:1 after flip-chip bonding and packaging. The transimpedance receiver-transmitter circuit can be operated at a frequency of 300 MHz.
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This paper proposes a smart frequency presetting technique for fast lock-in LC-PLL frequency synthesizer. The technique accurately presets the frequency of VCO with small initial frequency error and greatly reduces the lock-in time. It can automatically compensate preset frequency variation with process and temperature. A 2.4GHz synthesizer with 1MHz reference input was implemented in 0.35 mu m CMOS process. The chip core area is 0.4mm(2). Output frequency of VCO ranges from 2390 to 2600MHz. The measured results show that the typical lock-in time is 3 mu s. The phase noise is -112dBc/Hz at 600KHz offset from center frequency. The test chip consumes current of 22mA that includes the consumption of the I/O buffers.
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Password authentication has been adopted as one of the most commonly used solutions in network environment to protect resources from unauthorized access. Recently, Lee–Kim–Yoo [S.W. Lee, H.S. Kim, K.Y. Yoo, Improvement of Chien et al.'s remote user authentication scheme using smart cards, Computer Standards & Interfaces 27 (2) (2005) 181–183] and Lee-Chiu [N.Y. Lee, Y.C. Chiu, Improved remote authentication scheme with smart card, Computer Standards & Interfaces 27 (2) (2005) 177–180] respectively proposed a smart card based password authentication scheme. We show that these two schemes are both subject to forgery attacks provided that the information stored in the smart card is disclosed by the adversary. We also propose an improved scheme with formal security proof.
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多级安全数据库的安全策略需要各种模型来表达,访问控制模型是其中之一.强制访问控制(MAC)模型保证多级数据库中的信息流动符合系统的安全策略.利用基于角色的访问控制(RBAC)来实现MAC能方便多级安全数据库的权限管理.提出了一种MAC与RBAC的综合模型,定义了多级角色与内部角色的概念,并给出了综合模型中经过修改后的操作,使得系统能自动地完成符合强制访问控制策略的用户权限的管理.该模型方便了管理员的权限管理,适合用户较多,安全层次比较复杂的多级关系数据库系统.最后给出了模型的部分实现机制.
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中国墙策略的目的是防止在有竞争关系的企业间访问信息导致的利益冲突.著名的中国策略模型包括Brewer等人提出的BN模型和Sandhu提出的基于格访问控制模型实施的中国墙模型.然而这些模型都存在严重的缺陷:灵活性不够或者实施不方便.RBAC是目前主流的访问控制模型,该模型的特点是策略中立.基于RBAC模型全面研究了实施中国墙策略及其各种变种策略的方法,利用角色体系和RBAC的约束机制,给出了具体的构造方法,讨论了这些构造中约束的形式化描述方法.与传统的中国墙模型相比,更加灵活,并可在支持RBAC的系统中直接实施.
Resumo:
RBAC没有明确定义非法信息流,也没有提供信息流控制机制.RBAC系统中主体的访问操作 可以引起客体之间的信息流,使用户访问到未授权的信息.首次从授权策略的角度形式化地定义了 RBAC非法信息流,提出了一个检测RBAC配置中用户可以引起的非法信息流的算法,给出了一个动态 信息流控制算法.确保了RBAC访问控制目标的实现,增强了RBAC系统的安全性.
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提出了一种基于RBAC思想对可信第三方功能进行分类并结合其他一些技术实现电子商务中匿名性与可追究性的解决方案,主要涉及三个主要过程:用户的注册控制、交易过程的控制及投诉处理过程。通过对注册用户的信息进行加密并对加密密钥进行分割保存来实现匿名性,通过对交易过程安全协议的设计及TTP功能的划分达到可追究性要求,并对可追究性的实现给予证明。
Resumo:
门户能够有效地实现异构信息之间的集成与协作,并为用户提供可定制、统一且遵循规范的访问服务.然而,由于门户所具有的这些不同于普通Web应用的特性,也使得传统访问控制模型无法在门户中直接使用.提出了一种面向门户系统的访问控制模型p-RBAC.P-RBAC扩展了传统的基于角色访问控制模型,并根据行为状态进一步分为静态模型和动态模型.P-RBAC给出了静态模型和动态模型上的行为规则,提出了具体的动态权限指派和角色组织策略,从而有效地解决了门户的访问控制问题.实际的应用案例证明,P-RBAC模型能够适用于门户的访问控制,并较之传统访问控制模型更高效可行.
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中国计算机学会
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文中对基于角色访问控制(role-based access control, RBAC)研究中的两大热点——模型的建立和实现进行了较深入的研究,提出了一种新的RBAC模型——NRBAC模型.这一模型除具有全面性外,比之已有的RBAC96 模型还具有接近现实世界和形式统一的优点.针对NRBAC模型的实现,文中又提出了一种新的RBAC实现机制——基于时间戳和素数因子分解的二进制双钥-锁对( TPB-2-KLP)访问控制方案.它不仅能很好地克服已有RBAC实现机制存在的缺点,还兼备了对锁向量修改次数少和发生溢出可能性小的优点.
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于2010-11-23批量导入
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于2010-11-23批量导入
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The investigations on GaAs/AlGaAs multiple quantum well self electro-optic effect device (SEED) arrays for optoelectronic smart pixels are reported. The hybrid integration of GaAs/AlGaAs multiple quantum well devices flip-chip bonding directly over 1 mu m silicon CMOS circuits are demonstrated. The GaAs/AlGaAs multiple quantum well devices are designed for 850nm operation. The measurement results under applied biases show the good optoelectronic characteristics of elements in SEED arrays. The 4x4 optoelectronic crossbar structure consisting of hybrid CMOS-SEED smart pixels have been designed, which could be potentially used in optical interconnects for multiple processors.