Optical fringe multiplication technique with TEM nano-moiré method

In this paper, a nano-moiré fringe multiplication method is proposed, which can be used to measure nano-deformation of single crystal materials. The lattice structure of Si (111) is recorded on a film at a given magnification under a transmission microscope, which acts as a specimen grating. A parallel grating (binary type) on glass or film is selected as a reference grating. A multiplied nano-moiré fringe pattern can be reproduced in a 4f optical filter system with the specimen grating and the prepared reference grating. The successful results illustrate that this method can be used to measure deformation in nanometre scale. The method is especially useful in the measurement of the inhomogeneous displacement field, and can be utilized to characterize nano-mechanical behaviour of materials such as dislocation and atomic bond failure.

Twinning partial multiplication at grain boundary in nanocrystalline fcc metals

Most deformation twins in nanocrystalline face-centered cubic fcc metals have been observed to form from grain boundaries. The growth of such twins requires the emission of Shockley partials from the grain boundary on successive slip planes. However, it is statistically improbable for a partial to exist on every slip plane. Here we propose a dislocation reaction and cross-slip mechanism on the grain boundary that would supply a partial on every successive slip plane for twin growth.This mechanism can also produce a twin with macrostrain smaller than that caused by a conventional twin.

MODIFIED DIRECT TWOS-COMPLEMENT PARALLEL ARRAY MULTIPLICATION ALGORITHM FOR COMPLEX MATRIX OPERATION

A direct twos-complement parallel array multiplication algorithm is introduced and modified for digital optical numerical computation. The modified version overcomes the problems encountered in the conventional optical twos-complement algorithm. In the array, all the summands are generated in parallel, and the relevant summands having the same weights are added simultaneously without carries, resulting in the product expressed in a mixed twos-complement system. In a two-stage array, complex multiplication is possible with using four real subarrays. Furthermore, with a three-stage array architecture, complex matrix operation is straightforwardly accomplished. In the experiment, parallel two-stage array complex multiplication with liquid-crystal panels is demonstrated.

Fuzzy reasoning morphological operators and their optical implementation

Fuzzy-reasoning theory is widely used in industrial control. Mathematical morphology is a powerful tool to perform image processing. We apply fuzzy-reasoning theory to morphology and suggest a scheme of fuzzy-reasoning morphology, including fuzzy-reasoning dilation and erosion functions. These functions retain more fine details than the corresponding conventional morphological operators with the same structuring element. An optical implementation has been developed with area-coding and thresholding methods. (C) 1997 Optical Society of America.

Stable multiplication gain in GaN p-i-n avalanche photodiodes with large device area

Visible-blind p-i-n avalanche photodiodes (APDs) were fabricated with high-quality GaN epilayers deposited on c-plane sapphire substrates by metal-organic chemical vapour deposition. Due to low dislocation density and a sophisticated device fabrication process, the dark current was as small as similar to 0.05 nA under reverse bias up to 20V for devices with a large diameter of 200 mu m, which was among the largest device area for GaN-based p-i-n APDs yet reported. When the reverse bias exceeded 38V the dark current increased sharply, exhibiting a bulk avalanche field-dominated stable breakdown without microplasma formation or sidewall breakdown. With ultraviolet illumination (360 nm) an avalanche multiplication gain of 57 was achieved.

Performing Fast Addition and Multiplication by Transferring Single Electrons

This paper proposes novel fast addition and multiplication circuits that are based on non-binary redundant number systems and single electron (SE) devices. The circuits consist of MOSFET-based single-electron (SE) turnstiles. We use the number of electrons to represent discrete multiple-valued logic states and we finish arithmetic operations by controlling the number of electrons transferred. We construct a compact PD2,3 adder and a 12x12bit multiplier using the PD2,3 adder. The speed of the adder can be as high as 600MHz with 400nW power dissipation. The speed of the adder is regardless of its operand length. The proposed circuits have much smaller transistors than conventional circuits.

Performance of an embedded optical vector matrix multiplication processor architecture

An embedded architecture of optical vector matrix multiplier (OVMM) is presented. The embedded architecture is aimed at optimising the data flow of vector matrix multiplier (VMM) to promote its performance. Data dependence is discussed when the OVMM is connected to a cluster system. A simulator is built to analyse the performance according to the architecture. According to the simulation, Amdahl's law is used to analyse the hybrid opto-electronic system. It is found that the electronic part and its interaction with optical part form the bottleneck of system.